diff options
| author | Matthew Wahab <matthew.wahab@arm.com> | 2015-12-16 12:16:13 +0000 |
|---|---|---|
| committer | Matthew Wahab <mwahab@gcc.gnu.org> | 2015-12-16 12:16:13 +0000 |
| commit | 7fcaba1a9a340f6fa0879f3c98ab527dc3fad217 (patch) | |
| tree | 4a45a99d12386dc50174747b5ce08bb30bd12fd3 /gcc | |
| parent | 4c2e0828c18c6a377be41bc5f0ddef25a1865f45 (diff) | |
| download | gcc-7fcaba1a9a340f6fa0879f3c98ab527dc3fad217.zip gcc-7fcaba1a9a340f6fa0879f3c98ab527dc3fad217.tar.gz gcc-7fcaba1a9a340f6fa0879f3c98ab527dc3fad217.tar.bz2 | |
[ARM] Add ACLE intrinsics vqrdmlah and vqrdmlsh
* config/arm/arm_neon.h (vqrdmlah_s16, vqrdmlah_s32): New.
(vqrdmlahq_s16, vqrdmlahq_s32): New.
(vqrdmlsh_s16, vqrdmlsh_s32): New.
(vqrdmlahq_s16, vqrdmlshq_s32): New.
* config/arm/arm_neon_builtins.def: Add "vqrdmlah" and "vqrdmlsh".
From-SVN: r231685
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/arm/arm_neon.h | 50 | ||||
| -rw-r--r-- | gcc/config/arm/arm_neon_builtins.def | 2 |
3 files changed, 60 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a28614c..3a6df36 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,13 @@ 2015-12-16 Matthew Wahab <matthew.wahab@arm.com> + * config/arm/arm_neon.h (vqrdmlah_s16, vqrdmlah_s32): New. + (vqrdmlahq_s16, vqrdmlahq_s32): New. + (vqrdmlsh_s16, vqrdmlsh_s32): New. + (vqrdmlahq_s16, vqrdmlshq_s32): New. + * config/arm/arm_neon_builtins.def: Add "vqrdmlah" and "vqrdmlsh". + +2015-12-16 Matthew Wahab <matthew.wahab@arm.com> + * doc/sourcebuild.texi (ARM-specific attributes): Add "arm_v8_1a_neon_ok" and "arm_v8_1a_neon_hw". diff --git a/gcc/config/arm/arm_neon.h b/gcc/config/arm/arm_neon.h index 0a33d21..b617f80 100644 --- a/gcc/config/arm/arm_neon.h +++ b/gcc/config/arm/arm_neon.h @@ -1158,6 +1158,56 @@ vqrdmulhq_s32 (int32x4_t __a, int32x4_t __b) return (int32x4_t)__builtin_neon_vqrdmulhv4si (__a, __b); } +#ifdef __ARM_FEATURE_QRDMX +__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) +vqrdmlah_s16 (int16x4_t __a, int16x4_t __b, int16x4_t __c) +{ + return (int16x4_t)__builtin_neon_vqrdmlahv4hi (__a, __b, __c); +} + +__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) +vqrdmlah_s32 (int32x2_t __a, int32x2_t __b, int32x2_t __c) +{ + return (int32x2_t)__builtin_neon_vqrdmlahv2si (__a, __b, __c); +} + +__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) +vqrdmlahq_s16 (int16x8_t __a, int16x8_t __b, int16x8_t __c) +{ + return (int16x8_t)__builtin_neon_vqrdmlahv8hi (__a, __b, __c); +} + +__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) +vqrdmlahq_s32 (int32x4_t __a, int32x4_t __b, int32x4_t __c) +{ + return (int32x4_t)__builtin_neon_vqrdmlahv4si (__a, __b, __c); +} + +__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) +vqrdmlsh_s16 (int16x4_t __a, int16x4_t __b, int16x4_t __c) +{ + return (int16x4_t)__builtin_neon_vqrdmlshv4hi (__a, __b, __c); +} + +__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) +vqrdmlsh_s32 (int32x2_t __a, int32x2_t __b, int32x2_t __c) +{ + return (int32x2_t)__builtin_neon_vqrdmlshv2si (__a, __b, __c); +} + +__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) +vqrdmlshq_s16 (int16x8_t __a, int16x8_t __b, int16x8_t __c) +{ + return (int16x8_t)__builtin_neon_vqrdmlshv8hi (__a, __b, __c); +} + +__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) +vqrdmlshq_s32 (int32x4_t __a, int32x4_t __b, int32x4_t __c) +{ + return (int32x4_t)__builtin_neon_vqrdmlshv4si (__a, __b, __c); +} +#endif + __extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) vmull_s8 (int8x8_t __a, int8x8_t __b) { diff --git a/gcc/config/arm/arm_neon_builtins.def b/gcc/config/arm/arm_neon_builtins.def index 0b719df..8d5c0ca 100644 --- a/gcc/config/arm/arm_neon_builtins.def +++ b/gcc/config/arm/arm_neon_builtins.def @@ -45,6 +45,8 @@ VAR4 (BINOP, vqdmulh, v4hi, v2si, v8hi, v4si) VAR4 (BINOP, vqrdmulh, v4hi, v2si, v8hi, v4si) VAR2 (TERNOP, vqdmlal, v4hi, v2si) VAR2 (TERNOP, vqdmlsl, v4hi, v2si) +VAR4 (TERNOP, vqrdmlah, v4hi, v2si, v8hi, v4si) +VAR4 (TERNOP, vqrdmlsh, v4hi, v2si, v8hi, v4si) VAR3 (BINOP, vmullp, v8qi, v4hi, v2si) VAR3 (BINOP, vmulls, v8qi, v4hi, v2si) VAR3 (BINOP, vmullu, v8qi, v4hi, v2si) |