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author | Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de> | 2004-02-11 10:15:17 +0000 |
---|---|---|
committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2004-02-11 10:15:17 +0000 |
commit | 7f9be2564e0d9d3f6f5bec2af54f5ac5594f7be3 (patch) | |
tree | eb6f5996b9d181e53787abe0d079b47febd9c57f /gcc | |
parent | 6d0ef01e47ee5fa08d471d5801417942ecfdb3f9 (diff) | |
download | gcc-7f9be2564e0d9d3f6f5bec2af54f5ac5594f7be3.zip gcc-7f9be2564e0d9d3f6f5bec2af54f5ac5594f7be3.tar.gz gcc-7f9be2564e0d9d3f6f5bec2af54f5ac5594f7be3.tar.bz2 |
mips.h (TARGET_OLDABI): Define.
* config/mips/mips.h (TARGET_OLDABI): Define. Use TARGET_NEWABI and
TARGET_LODABI consistently.
* config/mips/mips.c (function_arg,mips_setup_incoming_varargs,
mips_va_arg,override_options,compute_frame_size,
mips_initial_elimination_offset,mips16_fp_args,build_mips16_call_stub
,mips_return_in_memory,mips_strict_argument_naming): Use TARGET_NEWABI
and TARGET_LODABI consistently.
* config/mips/mips.md (exception_receiver): Likewise.
* config/mips/linux64.h: Likewise.
From-SVN: r77643
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 12 | ||||
-rw-r--r-- | gcc/config/mips/linux64.h | 3 | ||||
-rw-r--r-- | gcc/config/mips/mips.c | 21 | ||||
-rw-r--r-- | gcc/config/mips/mips.h | 30 | ||||
-rw-r--r-- | gcc/config/mips/mips.md | 2 |
5 files changed, 35 insertions, 33 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ea05ce0..a87df98 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,15 @@ +2004-02-11 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de> + + * config/mips/mips.h (TARGET_OLDABI): Define. Use TARGET_NEWABI and + TARGET_LODABI consistently. + * config/mips/mips.c (function_arg,mips_setup_incoming_varargs, + mips_va_arg,override_options,compute_frame_size, + mips_initial_elimination_offset,mips16_fp_args,build_mips16_call_stub + ,mips_return_in_memory,mips_strict_argument_naming): Use TARGET_NEWABI + and TARGET_LODABI consistently. + * config/mips/mips.md (exception_receiver): Likewise. + * config/mips/linux64.h: Likewise. + 2004-02-11 Hartmut Penner <hpenner@de.ibm.com> * gcc/config/rs6000/rs6000.c (rs6000_override_options) diff --git a/gcc/config/mips/linux64.h b/gcc/config/mips/linux64.h index bac5d63..99ca55e 100644 --- a/gcc/config/mips/linux64.h +++ b/gcc/config/mips/linux64.h @@ -74,8 +74,7 @@ Boston, MA 02111-1307, USA. */ %{mabi=32:-melf32%{EB:b}%{EL:l}tsmip}" #undef LOCAL_LABEL_PREFIX -#define LOCAL_LABEL_PREFIX ((mips_abi == ABI_32 || mips_abi == ABI_O64) \ - ? "$" : ".") +#define LOCAL_LABEL_PREFIX (TARGET_OLDABI ? "$" : ".") /* The size in bytes of a DWARF field indicating an offset or length relative to a debug info section, specified to be 4 bytes in the DWARF-2 diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index ad6d3c5..4d3a5bf 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -3795,7 +3795,7 @@ function_arg (const CUMULATIVE_ARGS *cum, enum machine_mode mode, if (type != 0 && TREE_CODE (type) == RECORD_TYPE - && (mips_abi == ABI_N32 || mips_abi == ABI_64) + && TARGET_NEWABI && TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1) && named) @@ -4002,7 +4002,7 @@ mips_setup_incoming_varargs (CUMULATIVE_ARGS *cum, enum machine_mode mode, } } } - if (mips_abi == ABI_32 || mips_abi == ABI_O64) + if (TARGET_OLDABI) { /* No need for pretend arguments: the register parameter area was allocated by the caller. */ @@ -4392,8 +4392,7 @@ mips_va_arg (tree valist, tree type) that alignments <= UNITS_PER_WORD are preserved by the va_arg increment mechanism. */ - if ((mips_abi == ABI_N32 || mips_abi == ABI_64) - && TYPE_ALIGN (type) > 64) + if (TARGET_NEWABI && TYPE_ALIGN (type) > 64) align = 16; else if (TARGET_64BIT) align = 8; @@ -4742,7 +4741,7 @@ override_options (void) } } - if (mips_abi != ABI_32 && mips_abi != ABI_O64) + if (!TARGET_OLDABI) flag_pcc_struct_return = 0; #if defined(USE_COLLECT2) @@ -6425,7 +6424,7 @@ compute_frame_size (HOST_WIDE_INT size) /* Add in space reserved on the stack by the callee for storing arguments passed in registers. */ - if (mips_abi != ABI_32 && mips_abi != ABI_O64) + if (!TARGET_OLDABI) total_size += MIPS_STACK_ALIGN (current_function_pretend_args_size); /* Save other computed information. */ @@ -6496,7 +6495,7 @@ mips_initial_elimination_offset (int from, int to) case ARG_POINTER_REGNUM: offset = cfun->machine->frame.total_size; - if (mips_abi == ABI_N32 || mips_abi == ABI_64) + if (TARGET_NEWABI) offset -= current_function_pretend_args_size; break; @@ -7854,7 +7853,7 @@ mips16_fp_args (FILE *file, int fp_code, int from_fp_p) unsigned int f; /* This code only works for the original 32 bit ABI and the O64 ABI. */ - if (mips_abi != ABI_32 && mips_abi != ABI_O64) + if (!TARGET_OLDABI) abort (); if (from_fp_p) @@ -8051,7 +8050,7 @@ build_mips16_call_stub (rtx retval, rtx fn, rtx arg_size, int fp_code) /* This code will only work for o32 and o64 abis. The other ABI's require more sophisticated support. */ - if (mips_abi != ABI_32 && mips_abi != ABI_O64) + if (!TARGET_OLDABI) abort (); /* We can only handle SFmode and DFmode floating point return @@ -9357,7 +9356,7 @@ mips_hard_regno_nregs (int regno, enum machine_mode mode) static bool mips_return_in_memory (tree type, tree fndecl ATTRIBUTE_UNUSED) { - if (mips_abi == ABI_32 || mips_abi == ABI_O64) + if (TARGET_OLDABI) return (TYPE_MODE (type) == BLKmode); else return ((int_size_in_bytes (type) > (2 * UNITS_PER_WORD)) @@ -9367,7 +9366,7 @@ mips_return_in_memory (tree type, tree fndecl ATTRIBUTE_UNUSED) static bool mips_strict_argument_naming (CUMULATIVE_ARGS *ca ATTRIBUTE_UNUSED) { - return (mips_abi != ABI_32 && mips_abi != ABI_O64); + return !TARGET_OLDABI; } static int diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 90e8954..616557c 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -347,6 +347,7 @@ extern const struct mips_cpu_info *mips_tune_info; #define TUNE_SB1 (mips_tune == PROCESSOR_SB1) #define TUNE_SR71K (mips_tune == PROCESSOR_SR71000) +#define TARGET_OLDABI (mips_abi == ABI_32 || mips_abi == ABI_O64) #define TARGET_NEWABI (mips_abi == ABI_N32 || mips_abi == ABI_64) /* IRIX specific stuff. */ @@ -798,9 +799,7 @@ extern const struct mips_cpu_info *mips_tune_info; /* True if the ABI can only work with 64-bit integer registers. We generally allow ad-hoc variations for TARGET_SINGLE_FLOAT, but otherwise floating-point registers must also be 64-bit. */ -#define ABI_NEEDS_64BIT_REGS (mips_abi == ABI_64 \ - || mips_abi == ABI_O64 \ - || mips_abi == ABI_N32) +#define ABI_NEEDS_64BIT_REGS (TARGET_NEWABI || mips_abi == ABI_O64) /* Likewise for 32-bit regs. */ #define ABI_NEEDS_32BIT_REGS (mips_abi == ABI_32) @@ -1334,8 +1333,7 @@ extern const struct mips_cpu_info *mips_tune_info; #define FLOAT_TYPE_SIZE 32 #define DOUBLE_TYPE_SIZE 64 -#define LONG_DOUBLE_TYPE_SIZE \ - (mips_abi == ABI_N32 || mips_abi == ABI_64 ? 128 : 64) +#define LONG_DOUBLE_TYPE_SIZE (TARGET_NEWABI ? 128 : 64) /* long double is not a fixed mode, but the idea is that, if we support long double, we also want a 128-bit integer type. */ @@ -1358,8 +1356,8 @@ extern const struct mips_cpu_info *mips_tune_info; #define POINTERS_EXTEND_UNSIGNED 0 /* Allocation boundary (in *bits*) for storing arguments in argument list. */ -#define PARM_BOUNDARY ((mips_abi == ABI_O64 || mips_abi == ABI_N32 \ - || mips_abi == ABI_64 \ +#define PARM_BOUNDARY ((mips_abi == ABI_O64 \ + || TARGET_NEWABI \ || (mips_abi == ABI_EABI && TARGET_64BIT)) ? 64 : 32) @@ -2164,7 +2162,7 @@ extern enum reg_class mips_char_to_class[256]; /* o32 and o64 reserve stack space for all argument registers. */ #define REG_PARM_STACK_SPACE(FNDECL) \ - ((mips_abi == ABI_32 || mips_abi == ABI_O64) \ + (TARGET_OLDABI \ ? (MAX_ARGS_IN_REGISTERS * UNITS_PER_WORD) \ : 0) @@ -2175,10 +2173,7 @@ extern enum reg_class mips_char_to_class[256]; `current_function_outgoing_args_size'. */ #define OUTGOING_REG_PARM_STACK_SPACE -#define STACK_BOUNDARY \ - ((mips_abi == ABI_32 || mips_abi == ABI_O64 || mips_abi == ABI_EABI) \ - ? 64 : 128) - +#define STACK_BOUNDARY ((TARGET_OLDABI || mips_abi == ABI_EABI) ? 64 : 128) #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0 @@ -2188,8 +2183,7 @@ extern enum reg_class mips_char_to_class[256]; #define GP_RETURN (GP_REG_FIRST + 2) #define FP_RETURN ((TARGET_SOFT_FLOAT) ? GP_RETURN : (FP_REG_FIRST + 0)) -#define MAX_ARGS_IN_REGISTERS \ - ((mips_abi == ABI_32 || mips_abi == ABI_O64) ? 4 : 8) +#define MAX_ARGS_IN_REGISTERS (TARGET_OLDABI ? 4 : 8) /* Largest possible value of MAX_ARGS_IN_REGISTERS. */ @@ -2373,7 +2367,7 @@ typedef struct mips_args { /* Treat LOC as a byte offset from the stack pointer and round it up to the next fully-aligned offset. */ #define MIPS_STACK_ALIGN(LOC) \ - ((mips_abi == ABI_32 || mips_abi == ABI_O64 || mips_abi == ABI_EABI) \ + ((TARGET_OLDABI || mips_abi == ABI_EABI) \ ? ((LOC) + 7) & ~7 \ : ((LOC) + 15) & ~15) @@ -2396,7 +2390,7 @@ typedef struct mips_args { fprintf (FILE, "\t.set\tnoat\n"); \ fprintf (FILE, "\tmove\t%s,%s\t\t# save current return address\n", \ reg_names[GP_REG_FIRST + 1], reg_names[GP_REG_FIRST + 31]); \ - if (mips_abi != ABI_N32 && mips_abi != ABI_64) \ + if (!TARGET_NEWABI) \ { \ fprintf (FILE, \ "\t%s\t%s,%s,%d\t\t# _mcount pops 2 words from stack\n", \ @@ -3386,9 +3380,7 @@ while (0) /* See mips_expand_prologue's use of loadgp for when this should be true. */ -#define DONT_ACCESS_GBLS_AFTER_EPILOGUE (TARGET_ABICALLS \ - && mips_abi != ABI_32 \ - && mips_abi != ABI_O64) +#define DONT_ACCESS_GBLS_AFTER_EPILOGUE (TARGET_ABICALLS && !TARGET_OLDABI) #define DFMODE_NAN \ diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index caf88e2..a1b083f 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -8318,7 +8318,7 @@ ld\t%2,%1-%S1(%2)\;daddu\t%2,%2,$31\;%*j\t%2%/" (define_insn "exception_receiver" [(set (reg:SI 28) (unspec_volatile:SI [(const_int 0)] UNSPEC_EH_RECEIVER))] - "TARGET_ABICALLS && (mips_abi == ABI_32 || mips_abi == ABI_O64)" + "TARGET_ABICALLS && TARGET_OLDABI" { operands[0] = pic_offset_table_rtx; operands[1] = mips_gp_save_slot (); |