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| author | Richard Earnshaw <erich@gnu.org> | 1996-12-12 10:53:05 +0000 |
|---|---|---|
| committer | Richard Earnshaw <erich@gnu.org> | 1996-12-12 10:53:05 +0000 |
| commit | 7b64da89ba1a942bdbdde8dfba63805ae3d2fbc3 (patch) | |
| tree | c7815837ada8a990ebecd62d6a0f613ed2f02637 /gcc | |
| parent | 89418a92574448338464cb3503942a29a10e3eb8 (diff) | |
| download | gcc-7b64da89ba1a942bdbdde8dfba63805ae3d2fbc3.zip gcc-7b64da89ba1a942bdbdde8dfba63805ae3d2fbc3.tar.gz gcc-7b64da89ba1a942bdbdde8dfba63805ae3d2fbc3.tar.bz2 | |
(arm_gen_constant, case IOR,XOR): Don't invert a constant if loading
it into a temporary.
From-SVN: r13290
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/arm/arm.c | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 97ad6ed..fb4705c 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -701,8 +701,8 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate) case IOR: case XOR: - /* If we have IOR or XOR, and the inverse of the constant can be loaded - in a single instruction, and we can find a temporary to put it in, + /* If we have IOR or XOR, and the constant can be loaded in a + single instruction, and we can find a temporary to put it in, then this can be done in two instructions instead of 3-4. */ if (subtargets || (reload_completed && ! reg_mentioned_p (target, source))) @@ -713,8 +713,7 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate) { rtx sub = subtargets ? gen_reg_rtx (mode) : target; - emit_insn (gen_rtx (SET, VOIDmode, sub, - GEN_INT (ARM_SIGN_EXTEND (~ val)))); + emit_insn (gen_rtx (SET, VOIDmode, sub, GEN_INT (val))); emit_insn (gen_rtx (SET, VOIDmode, target, gen_rtx (code, mode, source, sub))); } |