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| author | Ian Bolton <ian.bolton@arm.com> | 2013-09-09 13:53:18 +0000 |
|---|---|---|
| committer | Ian Bolton <ibolton@gcc.gnu.org> | 2013-09-09 13:53:18 +0000 |
| commit | 78d8b9f019c6445a62e816576dfb6005963708ca (patch) | |
| tree | e823a125ab627cbe4e0173dfafbe0177c1cd05ab /gcc | |
| parent | aeda100f7b926c36213d5d7de9a600d23d4d7808 (diff) | |
| download | gcc-78d8b9f019c6445a62e816576dfb6005963708ca.zip gcc-78d8b9f019c6445a62e816576dfb6005963708ca.tar.gz gcc-78d8b9f019c6445a62e816576dfb6005963708ca.tar.bz2 | |
Improve handling of constants destined for FP_REGS on AArch64
From-SVN: r202403
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64.c | 14 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/aarch64/movdi_1.c | 26 |
4 files changed, 46 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 9a94ff4..2a4b5bc 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2013-09-09 Ian Bolton <ian.bolton@arm.com> + + * config/aarch64/aarch64.c (aarch64_preferred_reload_class): Return + NO_REGS for immediate that can't be moved directly into FP_REGS. + 2013-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/aarch64/aarch64.c (aarch64_select_cc_mode): Return CC_SWP for diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index d0bd38e..e8ae20a 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -4237,10 +4237,18 @@ aarch64_class_max_nregs (reg_class_t regclass, enum machine_mode mode) } static reg_class_t -aarch64_preferred_reload_class (rtx x ATTRIBUTE_UNUSED, reg_class_t regclass) +aarch64_preferred_reload_class (rtx x, reg_class_t regclass) { - return ((regclass == POINTER_REGS || regclass == STACK_REG) - ? GENERAL_REGS : regclass); + if (regclass == POINTER_REGS || regclass == STACK_REG) + return GENERAL_REGS; + + /* If it's an integer immediate that MOVI can't handle, then + FP_REGS is not an option, so we return NO_REGS instead. */ + if (CONST_INT_P (x) && reg_class_subset_p (regclass, FP_REGS) + && !aarch64_simd_imm_scalar_p (x, GET_MODE (x))) + return NO_REGS; + + return regclass; } void diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 5cc02a7..05100e6 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2013-09-09 Ian Bolton <ian.bolton@arm.com> + + * gcc.target/aarch64/movdi_1.c: New test. + 2013-09-09 Paolo Carlini <paolo.carlini@oracle.com> PR c++/58362 diff --git a/gcc/testsuite/gcc.target/aarch64/movdi_1.c b/gcc/testsuite/gcc.target/aarch64/movdi_1.c new file mode 100644 index 0000000..a22378d --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/movdi_1.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fno-inline" } */ + +#include <arm_neon.h> + +void +foo1 (uint64_t *a) +{ + uint64x1_t val18; + uint32x2_t val19; + uint64x1_t val20; + val19 = vcreate_u32 (0x800000004cf3dffbUL); + val20 = vrsra_n_u64 (val18, vreinterpret_u64_u32 (val19), 34); + vst1_u64 (a, val20); +} + +void +foo2 (uint64_t *a) +{ + uint64x1_t val18; + uint32x2_t val19; + uint64x1_t val20; + val19 = vcreate_u32 (0xdffbUL); + val20 = vrsra_n_u64 (val18, vreinterpret_u64_u32 (val19), 34); + vst1_u64 (a, val20); +} |