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| author | Renlin Li <renlin.li@arm.com> | 2015-04-16 08:36:21 +0000 |
|---|---|---|
| committer | Renlin Li <renlin@gcc.gnu.org> | 2015-04-16 08:36:21 +0000 |
| commit | 76978b21c6b7a3b9569c43bae4709b5e0cc5f653 (patch) | |
| tree | debf7a214288565fe0e545f930bf1ce2b7acbee0 /gcc | |
| parent | 72ed1126861875a4fae0d75f994e35f1b79509bd (diff) | |
| download | gcc-76978b21c6b7a3b9569c43bae4709b5e0cc5f653.zip gcc-76978b21c6b7a3b9569c43bae4709b5e0cc5f653.tar.gz gcc-76978b21c6b7a3b9569c43bae4709b5e0cc5f653.tar.bz2 | |
[PATCH]Enable two UNSIGNED_FLOAT simplifications in simplify_unary_operation_1.
gcc/
2015-04-16 Renlin Li <renlin.li@arm.com>
* simplify-rtx.c (simplify_unary_operation_1): Fix a typo. Enable two
simplifications for UNSIGNEDED_FLOAT.
gcc/testsuite/
2015-04-16 Renlin Li <renlin.li@arm.com>
* gcc.target/aarch64/unsigned-float.c: New.
* gcc.target/arm/unsigned-float.c: New.
From-SVN: r222143
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/simplify-rtx.c | 8 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/aarch64/unsigned-float.c | 18 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/arm/unsigned-float.c | 20 |
5 files changed, 52 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5ff0a23..392f679 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2015-04-16 Renlin Li <renlin.li@arm.com> + + * simplify-rtx.c (simplify_unary_operation_1): Fix a typo. Enable two + simplifications for UNSIGNED_FLOAT. + 2015-04-16 Nick Clifton <nickc@redhat.com> * config/rl78/rl78-opts.h (enum rl78_mul_types): Add MUL_G14 and diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c index 5d17498..4b18d3c 100644 --- a/gcc/simplify-rtx.c +++ b/gcc/simplify-rtx.c @@ -1171,7 +1171,7 @@ simplify_unary_operation_1 (enum rtx_code code, machine_mode mode, rtx op) = (float_truncate:SF foo:DF). (float_truncate:DF (float_extend:XF foo:SF)) - = (float_extend:SF foo:DF). */ + = (float_extend:DF foo:SF). */ if ((GET_CODE (op) == FLOAT_TRUNCATE && flag_unsafe_math_optimizations) || GET_CODE (op) == FLOAT_EXTEND) @@ -1183,14 +1183,14 @@ simplify_unary_operation_1 (enum rtx_code code, machine_mode mode, rtx op) XEXP (op, 0), mode); /* (float_truncate (float x)) is (float x) */ - if (GET_CODE (op) == FLOAT + if ((GET_CODE (op) == FLOAT || GET_CODE (op) == UNSIGNED_FLOAT) && (flag_unsafe_math_optimizations || (SCALAR_FLOAT_MODE_P (GET_MODE (op)) && ((unsigned)significand_size (GET_MODE (op)) >= (GET_MODE_PRECISION (GET_MODE (XEXP (op, 0))) - num_sign_bit_copies (XEXP (op, 0), GET_MODE (XEXP (op, 0)))))))) - return simplify_gen_unary (FLOAT, mode, + return simplify_gen_unary (GET_CODE (op), mode, XEXP (op, 0), GET_MODE (XEXP (op, 0))); @@ -1221,7 +1221,7 @@ simplify_unary_operation_1 (enum rtx_code code, machine_mode mode, rtx op) rounding can't happen. */ if (GET_CODE (op) == FLOAT_EXTEND - || (GET_CODE (op) == FLOAT + || ((GET_CODE (op) == FLOAT || GET_CODE (op) == UNSIGNED_FLOAT) && SCALAR_FLOAT_MODE_P (GET_MODE (op)) && ((unsigned)significand_size (GET_MODE (op)) >= (GET_MODE_PRECISION (GET_MODE (XEXP (op, 0))) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 2fd765c..f8e2279 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2015-04-16 Renlin Li <renlin.li@arm.com> + + * gcc.target/aarch64/unsigned-unsignedfloat.c: New. + * gcc.target/arm/unsigned-float.c: New. + 2015-04-16 Richard Biener <rguenther@suse.de> * gcc.dg/tree-ssa/ssa-ccp-36.c: New testcase. diff --git a/gcc/testsuite/gcc.target/aarch64/unsigned-float.c b/gcc/testsuite/gcc.target/aarch64/unsigned-float.c new file mode 100644 index 0000000..c5ad680 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/unsigned-float.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-O1" } */ + +#include <stdint.h> + +double +f1 (uint16_t x) +{ + return (double)(float)x; +} + +float +f2 (uint16_t x) +{ + return (float)(double)x; +} + +/* { dg-final { scan-assembler-not "fcvt" } } */ diff --git a/gcc/testsuite/gcc.target/arm/unsigned-float.c b/gcc/testsuite/gcc.target/arm/unsigned-float.c new file mode 100644 index 0000000..bb05c85 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/unsigned-float.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_vfp_ok } */ +/* { dg-options "-march=armv7-a -O1 -mfloat-abi=softfp" } */ +/* { dg-skip-if "need fp instructions" { *-*-* } { "-mfloat-abi=soft" } { "" } } */ + +#include <stdint.h> + +double +f1 (uint16_t x) +{ + return (double)(float)x; +} + +float +f2 (uint16_t x) +{ + return (float)(double)x; +} + +/* { dg-final { scan-assembler-not "vcvt.(f32.f64|f64.f32)" } } */ |