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| author | Richard Henderson <richard.henderson@linaro.org> | 2025-08-07 09:37:36 +0000 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2025-08-11 23:25:08 +0000 |
| commit | 75097ad09e8169912d8640f49ac0379e8a713215 (patch) | |
| tree | 958eb9038b71463eb32b318c98b1884c45224452 /gcc | |
| parent | d91b9432f3d7a1458888e2705dc5c700ed4fe25d (diff) | |
| download | gcc-75097ad09e8169912d8640f49ac0379e8a713215.zip gcc-75097ad09e8169912d8640f49ac0379e8a713215.tar.gz gcc-75097ad09e8169912d8640f49ac0379e8a713215.tar.bz2 | |
aarch64: Fix gcs save/restore_stack_nonlocal
The save/restore_stack_nonlocal patterns passed a DImode rtx to
gen_tbranch_neqi3 for a QImode compare. But since we're seeding
r16 with 1, GCSEnabled will clear the only set bit in r16, so we
can use CBNZ instead of TBNZ.
gcc:
* config/aarch64/aarch64.md (tbranch_<EQL><SHORT>3): Remove.
(save_stack_nonlocal): Use aarch64_gen_compare_zero_and_branch.
(restore_stack_nonlocal): Likewise.
gcc/testsuite:
* gcc.target/aarch64/gcs-nonlocal-3.c: Match cbnz.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/aarch64/aarch64.md | 14 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/aarch64/gcs-nonlocal-3.c | 2 |
2 files changed, 8 insertions, 8 deletions
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 3da5bc2..7fbd07e 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -1413,16 +1413,16 @@ /* Save GCS with code like mov x16, 1 chkfeat x16 - tbnz x16, 0, .L_done + cbnz x16, .L_done mrs tmp, gcspr_el0 str tmp, [%0, 8] .L_done: */ - rtx done_label = gen_label_rtx (); + auto done_label = gen_label_rtx (); rtx r16 = gen_rtx_REG (DImode, R16_REGNUM); emit_move_insn (r16, const1_rtx); emit_insn (gen_aarch64_chkfeat ()); - emit_insn (gen_tbranch_neqi3 (r16, const0_rtx, done_label)); + emit_jump_insn (aarch64_gen_compare_zero_and_branch (NE, r16, done_label)); rtx gcs_slot = adjust_address (operands[0], Pmode, GET_MODE_SIZE (Pmode)); rtx gcs = gen_reg_rtx (Pmode); emit_insn (gen_aarch64_load_gcspr (gcs)); @@ -1445,7 +1445,7 @@ /* Restore GCS with code like mov x16, 1 chkfeat x16 - tbnz x16, 0, .L_done + cbnz x16, .L_done ldr tmp1, [%1, 8] mrs tmp2, gcspr_el0 subs tmp2, tmp1, tmp2 @@ -1456,12 +1456,12 @@ b.ne .L_loop .L_done: */ - rtx loop_label = gen_label_rtx (); - rtx done_label = gen_label_rtx (); + auto loop_label = gen_label_rtx (); + auto done_label = gen_label_rtx (); rtx r16 = gen_rtx_REG (DImode, R16_REGNUM); emit_move_insn (r16, const1_rtx); emit_insn (gen_aarch64_chkfeat ()); - emit_insn (gen_tbranch_neqi3 (r16, const0_rtx, done_label)); + emit_jump_insn (aarch64_gen_compare_zero_and_branch (NE, r16, done_label)); rtx gcs_slot = adjust_address (operands[1], Pmode, GET_MODE_SIZE (Pmode)); rtx gcs_old = gen_reg_rtx (Pmode); emit_move_insn (gcs_old, gcs_slot); diff --git a/gcc/testsuite/gcc.target/aarch64/gcs-nonlocal-3.c b/gcc/testsuite/gcc.target/aarch64/gcs-nonlocal-3.c index e2391555..7a76b14 100644 --- a/gcc/testsuite/gcc.target/aarch64/gcs-nonlocal-3.c +++ b/gcc/testsuite/gcc.target/aarch64/gcs-nonlocal-3.c @@ -7,7 +7,7 @@ void run (void (*)()); ** bar.0: ** ... ** hint 40 // chkfeat x16 -** tbnz w16, 0, (\.L[0-9]+) +** cbnz x16, (\.L[0-9]+) ** ... ** mrs (x[0-9]+), s3_3_c2_c5_1 // gcspr_el0 ** subs x[0-9]+, x[0-9]+, \2 |