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| author | Michael Meissner <meissner@linux.vnet.ibm.com> | 2016-07-01 18:23:29 +0000 |
|---|---|---|
| committer | Michael Meissner <meissner@gcc.gnu.org> | 2016-07-01 18:23:29 +0000 |
| commit | 70c119669e75536e1ef8fa197838ed54fc356c69 (patch) | |
| tree | 61acca698a8064ffd961a7c6b8a1aba22cc11c61 /gcc | |
| parent | a8dbab92f0f397bd4b5f5a8d4fc08823006151be (diff) | |
| download | gcc-70c119669e75536e1ef8fa197838ed54fc356c69.zip gcc-70c119669e75536e1ef8fa197838ed54fc356c69.tar.gz gcc-70c119669e75536e1ef8fa197838ed54fc356c69.tar.bz2 | |
re PR target/71720 (initialization of a vector of floats generates incorrect code for -mcpu=power9)
[gcc]
2016-07-01 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/71720
* config/rs6000/vsx.md (vsx_splat_v4sf_internal): When splitting
the insns, use vsx_xxspltw_v4sf_direct which does not check for
little endian.
[gcc/testsuite]
2016-07-01 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/71720
* gcc.target/powerpc/pr71720.c: New test.
From-SVN: r237920
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/rs6000/vsx.md | 5 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/powerpc/pr71720.c | 15 |
4 files changed, 29 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4020a4e..a2fccf5 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2016-07-01 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/71720 + * config/rs6000/vsx.md (vsx_splat_v4sf_internal): When splitting + the insns, use vsx_xxspltw_v4sf_direct which does not check for + little endian. + 2016-07-01 Jan Beulich <jbeulich@suse.com> * varasm.c (get_variable_section): Validate initializer in diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index 2e1d41d..861b147 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -2512,9 +2512,8 @@ [(set (match_dup 0) (unspec:V4SF [(match_dup 1)] UNSPEC_VSX_CVDPSPN)) (set (match_dup 0) - (vec_duplicate:V4SF - (vec_select:SF (match_dup 0) - (parallel [(const_int 0)]))))] + (unspec:V4SF [(match_dup 0) + (const_int 0)] UNSPEC_VSX_XXSPLTW))] "" [(set_attr "type" "vecload,vecperm,mftgpr") (set_attr "length" "4,8,4")]) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 382c172..a1255a0 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2016-07-01 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/71720 + * gcc.target/powerpc/pr71720.c: New test. + 2016-07-01 Jan Beulich <jbeulich@suse.com> * gcc.dg/bss.c: New. diff --git a/gcc/testsuite/gcc.target/powerpc/pr71720.c b/gcc/testsuite/gcc.target/powerpc/pr71720.c new file mode 100644 index 0000000..a0c330d --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr71720.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-options "-mcpu=power9 -O2 -mupper-regs-di" } */ + +/* Verify that we generate xxspltw <reg>,<reg>,0 for V4SFmode splat. */ + +vector float +splat_v4sf (float f) +{ + return (vector float) { f, f, f, f }; +} + +/* { dg-final { scan-assembler "xscvdpspn " } } */ +/* { dg-final { scan-assembler "xxspltw .*,.*,0" } } */ |