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author | Tamar Christina <tamar.christina@arm.com> | 2017-11-17 10:47:52 +0000 |
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committer | Tamar Christina <tnfchris@gcc.gnu.org> | 2017-11-17 10:47:52 +0000 |
commit | 6f203500991046555099e72ca8794d60d50ef41d (patch) | |
tree | d3c3f38c9249ec3af301a9a59de5074e880813bf /gcc | |
parent | 7326cf0fb08b1977171aa97bc8370d950129c813 (diff) | |
download | gcc-6f203500991046555099e72ca8794d60d50ef41d.zip gcc-6f203500991046555099e72ca8794d60d50ef41d.tar.gz gcc-6f203500991046555099e72ca8794d60d50ef41d.tar.bz2 |
expr.c (copy_blkmode_to_reg): Fix bitsize for targets with fast unaligned access.
2017-11-17 Tamar Christina <tamar.christina@arm.com>
* expr.c (copy_blkmode_to_reg): Fix bitsize for targets
with fast unaligned access.
* doc/sourcebuild.texi (word_mode_no_slow_unalign): New.
gcc/testsuite/
2017-11-17 Tamar Christina <tamar.christina@arm.com>
* gcc.dg/struct-simple.c: New.
* lib/target-supports.exp
(check_effective_target_word_mode_no_slow_unalign): New.
From-SVN: r254862
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 6 | ||||
-rw-r--r-- | gcc/doc/sourcebuild.texi | 4 | ||||
-rw-r--r-- | gcc/expr.c | 4 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 6 | ||||
-rw-r--r-- | gcc/testsuite/gcc.dg/struct-simple.c | 52 | ||||
-rw-r--r-- | gcc/testsuite/lib/target-supports.exp | 25 |
6 files changed, 96 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e371bf7..b37fd6f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2017-11-17 Tamar Christina <tamar.christina@arm.com> + + * expr.c (copy_blkmode_to_reg): Fix bitsize for targets + with fast unaligned access. + * doc/sourcebuild.texi (word_mode_no_slow_unalign): New. + 2017-11-17 Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/arm.c (cmse_nonsecure_entry_clear_before_return): Allocate diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi index d5a90e5..d1a3ec0 100644 --- a/gcc/doc/sourcebuild.texi +++ b/gcc/doc/sourcebuild.texi @@ -2240,8 +2240,12 @@ Target supports @code{wchar_t} that is compatible with @code{char32_t}. @item comdat_group Target uses comdat groups. + +@item word_mode_no_slow_unalign +Target does not have slow unaligned access when doing word size accesses. @end table + @subsubsection Local to tests in @code{gcc.target/i386} @table @code @@ -2772,7 +2772,9 @@ copy_blkmode_to_reg (machine_mode mode_in, tree src) n_regs = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD; dst_words = XALLOCAVEC (rtx, n_regs); - bitsize = MIN (TYPE_ALIGN (TREE_TYPE (src)), BITS_PER_WORD); + bitsize = BITS_PER_WORD; + if (targetm.slow_unaligned_access (word_mode, TYPE_ALIGN (TREE_TYPE (src)))) + bitsize = MIN (TYPE_ALIGN (TREE_TYPE (src)), BITS_PER_WORD); /* Copy the structure BITSIZE bits at a time. */ for (bitpos = 0, xbitpos = padding_correction; diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 652ddc8..c3dc5f9 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2017-11-17 Tamar Christina <tamar.christina@arm.com> + + * gcc.dg/struct-simple.c: New. + * lib/target-supports.exp + (check_effective_target_word_mode_no_slow_unalign): New. + 2017-11-17 Thomas Preud'homme <thomas.preudhomme@arm.com> * gcc.target/arm/cmse/cmse-14.c: Change logic to match branch diff --git a/gcc/testsuite/gcc.dg/struct-simple.c b/gcc/testsuite/gcc.dg/struct-simple.c new file mode 100644 index 0000000..17b9560 --- /dev/null +++ b/gcc/testsuite/gcc.dg/struct-simple.c @@ -0,0 +1,52 @@ +/* { dg-do-run } */ +/* { dg-require-effective-target word_mode_no_slow_unalign } */ +/* { dg-additional-options "-fdump-rtl-final" } */ + +/* Copyright 1996, 1999, 2007 Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with GCC; see the file COPYING3. If not see + <http://www.gnu.org/licenses/>. + + Please email any bugs, comments, and/or additions to this file to: + bug-gdb@prep.ai.mit.edu */ + +#include <stdio.h> + +struct struct3 { char a, b, c; }; +struct struct3 foo3 = { 'A', 'B', 'C'}, L3; + +struct struct3 fun3() +{ + return foo3; +} + +#ifdef PROTOTYPES +void Fun3(struct struct3 foo3) +#else +void Fun3(foo3) + struct struct3 foo3; +#endif +{ + L3 = foo3; +} + +int main() +{ + struct struct3 x = fun3(); + + printf("a:%c, b:%c, c:%c\n", x.a, x.b, x.c); +} + +/* { dg-final { scan-rtl-dump-not {zero_extract:.+\[\s*foo3\s*\]} "final" } } */ + diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 881f849..d80da69 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -6222,6 +6222,31 @@ proc check_effective_target_unaligned_stack { } { return $et_unaligned_stack_saved } +# Return 1 if the target plus current options does not have +# slow unaligned access when using word size accesses. +# +# This won't change for different subtargets so cache the result. + +proc check_effective_target_word_mode_no_slow_unalign { } { + global et_word_mode_no_slow_unalign_saved + global et_index + + if [info exists et_word_mode_no_slow_unalign_saved($et_index)] { + verbose "check_effective_target_word_mode_no_slow_unalign: \ + using cached result" 2 + } else { + set et_word_mode_no_slow_unalign_saved($et_index) 0 + if { [is-effective-target non_strict_align] + && !([istarget arm*-*-*]) + } { + set et_word_mode_no_slow_unalign_saved($et_index) 1 + } + } + verbose "check_effective_target_word_mode_no_slow_unalign:\ + returning $et_word_mode_no_slow_unalign_saved($et_index)" 2 + return $et_word_mode_no_slow_unalign_saved($et_index) +} + # Return 1 if the target plus current options does not support a vector # alignment mechanism, 0 otherwise. # |