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| author | Alan Lawrence <alan.lawrence@arm.com> | 2015-09-15 12:33:42 +0000 |
|---|---|---|
| committer | Alan Lawrence <alalaw01@gcc.gnu.org> | 2015-09-15 12:33:42 +0000 |
| commit | 6ec0e5b9c323dbbdfafb49d2c946be8f43237214 (patch) | |
| tree | 73e9b8865e6566a4a1a9368ba6206dffebd49c49 /gcc | |
| parent | 7e56d668646e384a2c6cb9f903bdf2b47f31b129 (diff) | |
| download | gcc-6ec0e5b9c323dbbdfafb49d2c946be8f43237214.zip gcc-6ec0e5b9c323dbbdfafb49d2c946be8f43237214.tar.gz gcc-6ec0e5b9c323dbbdfafb49d2c946be8f43237214.tar.bz2 | |
[AArch64 array_mode 4/8] Remove EImode
* config/aarch64/aarch64.c (aarch64_simd_attr_length_rglist): Update
comment.
* config/aarch64/aarch64-builtins.c (ei_UP): Remove.
(aarch64_simd_intEI_type_node): Likewise.
(aarch64_simd_builtin_std_type): Remove EImode case.
(aarch64_init_simd_builtin_types): Don't create/add intEI_type_node.
* config/aarch64/aarch64-modes.def: Remove EImode.
From-SVN: r227787
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 12 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64-builtins.c | 8 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64-modes.def | 5 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64.c | 2 |
4 files changed, 14 insertions, 13 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 44373e1..d4db5af 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,4 +1,14 @@ -2015-09-08 Alan Lawrence <alan.lawrence@arm.com> +2015-09-15 Alan Lawrence <alan.lawrence@arm.com> + + * config/aarch64/aarch64.c (aarch64_simd_attr_length_rglist): Update + comment. + * config/aarch64/aarch64-builtins.c (ei_UP): Remove. + (aarch64_simd_intEI_type_node): Likewise. + (aarch64_simd_builtin_std_type): Remove EImode case. + (aarch64_init_simd_builtin_types): Don't create/add intEI_type_node. + * config/aarch64/aarch64-modes.def: Remove EImode. + +2015-09-15 Alan Lawrence <alan.lawrence@arm.com> * config/aarch64/aarch64-simd.md (aarch64_simd_ld3r<mode>): Change operand mode from <V_THREE_ELEM> to BLK. diff --git a/gcc/config/aarch64/aarch64-builtins.c b/gcc/config/aarch64/aarch64-builtins.c index 5a04263..c86f47d 100644 --- a/gcc/config/aarch64/aarch64-builtins.c +++ b/gcc/config/aarch64/aarch64-builtins.c @@ -75,7 +75,6 @@ #define v2di_UP V2DImode #define v2df_UP V2DFmode #define ti_UP TImode -#define ei_UP EImode #define oi_UP OImode #define ci_UP CImode #define xi_UP XImode @@ -449,7 +448,6 @@ static struct aarch64_simd_type_info aarch64_simd_types [] = { static tree aarch64_fp16_type_node = NULL_TREE; static tree aarch64_simd_intOI_type_node = NULL_TREE; -static tree aarch64_simd_intEI_type_node = NULL_TREE; static tree aarch64_simd_intCI_type_node = NULL_TREE; static tree aarch64_simd_intXI_type_node = NULL_TREE; @@ -523,8 +521,6 @@ aarch64_simd_builtin_std_type (enum machine_mode mode, return QUAL_TYPE (TI); case OImode: return aarch64_simd_intOI_type_node; - case EImode: - return aarch64_simd_intEI_type_node; case CImode: return aarch64_simd_intCI_type_node; case XImode: @@ -641,15 +637,11 @@ aarch64_init_simd_builtin_types (void) #define AARCH64_BUILD_SIGNED_TYPE(mode) \ make_signed_type (GET_MODE_PRECISION (mode)); aarch64_simd_intOI_type_node = AARCH64_BUILD_SIGNED_TYPE (OImode); - aarch64_simd_intEI_type_node = AARCH64_BUILD_SIGNED_TYPE (EImode); aarch64_simd_intCI_type_node = AARCH64_BUILD_SIGNED_TYPE (CImode); aarch64_simd_intXI_type_node = AARCH64_BUILD_SIGNED_TYPE (XImode); #undef AARCH64_BUILD_SIGNED_TYPE tdecl = add_builtin_type - ("__builtin_aarch64_simd_ei" , aarch64_simd_intEI_type_node); - TYPE_NAME (aarch64_simd_intEI_type_node) = tdecl; - tdecl = add_builtin_type ("__builtin_aarch64_simd_oi" , aarch64_simd_intOI_type_node); TYPE_NAME (aarch64_simd_intOI_type_node) = tdecl; tdecl = add_builtin_type diff --git a/gcc/config/aarch64/aarch64-modes.def b/gcc/config/aarch64/aarch64-modes.def index 3160bef..3bf3b2d 100644 --- a/gcc/config/aarch64/aarch64-modes.def +++ b/gcc/config/aarch64/aarch64-modes.def @@ -50,9 +50,8 @@ VECTOR_MODE (FLOAT, DF, 1); /* V1DF. */ /* Oct Int: 256-bit integer mode needed for 32-byte vector arguments. */ INT_MODE (OI, 32); -/* Opaque integer modes for 3, 6 or 8 Neon double registers (2 is - TImode). */ -INT_MODE (EI, 24); +/* Opaque integer modes for 3 or 4 Neon q-registers / 6 or 8 Neon d-registers + (2 d-regs = 1 q-reg = TImode). */ INT_MODE (CI, 48); INT_MODE (XI, 64); diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 4d2126b..9c5cf4c 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -10577,7 +10577,7 @@ aarch64_simd_attr_length_move (rtx_insn *insn) } /* Compute and return the length of aarch64_simd_reglist<mode>, where <mode> is - one of VSTRUCT modes: OI, CI, EI, or XI. */ + one of VSTRUCT modes: OI, CI, or XI. */ int aarch64_simd_attr_length_rglist (enum machine_mode mode) { |