elf.h (ASM_SPEC): Remove no-density option.

	* config/xtensa/elf.h (ASM_SPEC): Remove no-density option.  Reformat.
	* config/xtensa/linux.h (ASM_SPEC): Likewise.
	* config/xtensa/xtensa.h (TARGET_SWITCHES): Remove -mbig-endian,
	-mlittle-endian, -m[no-]density, -m[no-]abs, -m[no-]addx, -m[no-]mac16,
	-m[no-]mul16, -m[no-]mul32, -m[no-]nsa, -m[no-]minmax, -m[no-]sext,
	-m[no-]booleans, -mhard-float, -msoft-float, -m[no-]hard-float-div,
	-m[no-]hard-float-recip, -m[no-]hard-float-sqrt, and
	-m[no-]hard-float-rsqrt options.  Delete corresponding MASK_* macros
	and redefine corresponding TARGET_* macros with constants from the
	xtensa-config.h header.
	* doc/invoke.texi (Option Summary, Xtensa Options): Remove documention
	for the options listed above.

From-SVN: r71339

5 files changed, 59 insertions, 265 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 60e7bd9..930abaa 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,18 @@
+2003-09-12  Bob Wilson  <bob.wilson@acm.org>
+	
+	* config/xtensa/elf.h (ASM_SPEC): Remove no-density option.  Reformat.
+	* config/xtensa/linux.h (ASM_SPEC): Likewise.
+	* config/xtensa/xtensa.h (TARGET_SWITCHES): Remove -mbig-endian,
+	-mlittle-endian, -m[no-]density, -m[no-]abs, -m[no-]addx, -m[no-]mac16,
+	-m[no-]mul16, -m[no-]mul32, -m[no-]nsa, -m[no-]minmax, -m[no-]sext,
+	-m[no-]booleans, -mhard-float, -msoft-float, -m[no-]hard-float-div,
+	-m[no-]hard-float-recip, -m[no-]hard-float-sqrt, and
+	-m[no-]hard-float-rsqrt options.  Delete corresponding MASK_* macros
+	and redefine corresponding TARGET_* macros with constants from the
+	xtensa-config.h header.
+	* doc/invoke.texi (Option Summary, Xtensa Options): Remove documention
+	for the options listed above.
+	
 2003-09-12  Dale Johannesen  <dale@apple.com>
 	* config/rs6000/rs6000-protos.h:  Use C90 prototypes.
 	* config/rs6000/rs6000-c.c:  Ditto. 
diff --git a/gcc/config/xtensa/elf.h b/gcc/config/xtensa/elf.h
index 65b0f6e..849be87 100644
--- a/gcc/config/xtensa/elf.h
+++ b/gcc/config/xtensa/elf.h
@@ -43,13 +43,14 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
 #define WCHAR_TYPE_SIZE 16
 
 #undef ASM_SPEC
-#define ASM_SPEC "%{v} %{mno-density:--no-density} \
-                  %{mtext-section-literals:--text-section-literals} \
-                  %{mno-text-section-literals:--no-text-section-literals} \
-		  %{mtarget-align:--target-align} \
-		  %{mno-target-align:--no-target-align} \
-		  %{mlongcalls:--longcalls} \
-		  %{mno-longcalls:--no-longcalls}"
+#define ASM_SPEC \
+ "%{v} \
+  %{mtext-section-literals:--text-section-literals} \
+  %{mno-text-section-literals:--no-text-section-literals} \
+  %{mtarget-align:--target-align} \
+  %{mno-target-align:--no-target-align} \
+  %{mlongcalls:--longcalls} \
+  %{mno-longcalls:--no-longcalls}"
 
 #undef LIB_SPEC
 #define LIB_SPEC "-lc -lsim -lc -lhandlers-sim -lhal"
diff --git a/gcc/config/xtensa/linux.h b/gcc/config/xtensa/linux.h
index d8b230f..ef5aae0 100644
--- a/gcc/config/xtensa/linux.h
+++ b/gcc/config/xtensa/linux.h
@@ -40,13 +40,14 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
 #define WCHAR_TYPE_SIZE 32
 
 #undef ASM_SPEC
-#define ASM_SPEC "%{v} %{mno-density:--no-density} \
-                  %{mtext-section-literals:--text-section-literals} \
-                  %{mno-text-section-literals:--no-text-section-literals} \
-		  %{mtarget-align:--target-align} \
-		  %{mno-target-align:--no-target-align} \
-		  %{mlongcalls:--longcalls} \
-		  %{mno-longcalls:--no-longcalls}"
+#define ASM_SPEC \
+ "%{v} \
+  %{mtext-section-literals:--text-section-literals} \
+  %{mno-text-section-literals:--no-text-section-literals} \
+  %{mtarget-align:--target-align} \
+  %{mno-target-align:--no-target-align} \
+  %{mlongcalls:--longcalls} \
+  %{mno-longcalls:--no-longcalls}"
 
 #undef LINK_SPEC
 #define LINK_SPEC \
diff --git a/gcc/config/xtensa/xtensa.h b/gcc/config/xtensa/xtensa.h
index 558084b..c99d15d 100644
--- a/gcc/config/xtensa/xtensa.h
+++ b/gcc/config/xtensa/xtensa.h
@@ -42,148 +42,43 @@ extern struct rtx_def * branch_cmp[2];	/* operands for compare */
 extern enum cmp_type branch_type;	/* what type of branch to use */
 extern unsigned xtensa_current_frame_size;
 
-/* Run-time compilation parameters selecting different hardware subsets.  */
-
-#define MASK_BIG_ENDIAN		0x00000001	/* big or little endian */
-#define MASK_DENSITY		0x00000002	/* code density option */
-#define MASK_MAC16		0x00000004	/* MAC16 option */
-#define MASK_MUL16		0x00000008	/* 16-bit integer multiply */
-#define MASK_MUL32		0x00000010	/* integer multiply/divide */
-#define MASK_DIV32		0x00000020	/* integer multiply/divide */
-#define MASK_NSA		0x00000040	/* nsa instruction option */
-#define MASK_MINMAX		0x00000080	/* min/max instructions */
-#define MASK_SEXT		0x00000100	/* sign extend insn option */
-#define MASK_BOOLEANS		0x00000200	/* boolean register option */
-#define MASK_HARD_FLOAT		0x00000400	/* floating-point option */
-#define MASK_HARD_FLOAT_DIV	0x00000800	/* floating-point divide */
-#define MASK_HARD_FLOAT_RECIP	0x00001000	/* floating-point reciprocal */
-#define MASK_HARD_FLOAT_SQRT	0x00002000	/* floating-point sqrt */
-#define MASK_HARD_FLOAT_RSQRT	0x00004000	/* floating-point recip sqrt */
-#define MASK_NO_FUSED_MADD	0x00008000	/* avoid f-p mul/add */
-#define MASK_CONST16		0x00010000	/* use CONST16 instruction */
-#define MASK_ABS		0x00020000	/* use ABS instruction */
-#define MASK_ADDX		0x00040000	/* use ADDX* and SUBX* */
-
-/* Macros used in the machine description to test the flags.  */
-
-#define TARGET_BIG_ENDIAN	(target_flags & MASK_BIG_ENDIAN)
-#define TARGET_DENSITY		(target_flags & MASK_DENSITY)
-#define TARGET_MAC16		(target_flags & MASK_MAC16)
-#define TARGET_MUL16		(target_flags & MASK_MUL16)
-#define TARGET_MUL32		(target_flags & MASK_MUL32)
-#define TARGET_DIV32		(target_flags & MASK_DIV32)
-#define TARGET_NSA		(target_flags & MASK_NSA)
-#define TARGET_MINMAX		(target_flags & MASK_MINMAX)
-#define TARGET_SEXT		(target_flags & MASK_SEXT)
-#define TARGET_BOOLEANS		(target_flags & MASK_BOOLEANS)
-#define TARGET_HARD_FLOAT	(target_flags & MASK_HARD_FLOAT)
-#define TARGET_HARD_FLOAT_DIV	(target_flags & MASK_HARD_FLOAT_DIV)
-#define TARGET_HARD_FLOAT_RECIP	(target_flags & MASK_HARD_FLOAT_RECIP)
-#define TARGET_HARD_FLOAT_SQRT	(target_flags & MASK_HARD_FLOAT_SQRT)
-#define TARGET_HARD_FLOAT_RSQRT	(target_flags & MASK_HARD_FLOAT_RSQRT)
+/* Masks for the -m switches */
+#define MASK_NO_FUSED_MADD	0x00000001	/* avoid f-p mul/add */
+#define MASK_CONST16		0x00000002	/* use CONST16 instruction */
+
+/* Macros used in the machine description to select various Xtensa
+   configuration options.  */
+#define TARGET_BIG_ENDIAN	XCHAL_HAVE_BE
+#define TARGET_DENSITY		XCHAL_HAVE_DENSITY
+#define TARGET_MAC16		XCHAL_HAVE_MAC16
+#define TARGET_MUL16		XCHAL_HAVE_MUL16
+#define TARGET_MUL32		XCHAL_HAVE_MUL32
+#define TARGET_DIV32		XCHAL_HAVE_DIV32
+#define TARGET_NSA		XCHAL_HAVE_NSA
+#define TARGET_MINMAX		XCHAL_HAVE_MINMAX
+#define TARGET_SEXT		XCHAL_HAVE_SEXT
+#define TARGET_BOOLEANS		XCHAL_HAVE_BOOLEANS
+#define TARGET_HARD_FLOAT	XCHAL_HAVE_FP
+#define TARGET_HARD_FLOAT_DIV	XCHAL_HAVE_FP_DIV
+#define TARGET_HARD_FLOAT_RECIP	XCHAL_HAVE_FP_RECIP
+#define TARGET_HARD_FLOAT_SQRT	XCHAL_HAVE_FP_SQRT
+#define TARGET_HARD_FLOAT_RSQRT	XCHAL_HAVE_FP_RSQRT
+#define TARGET_ABS		XCHAL_HAVE_ABS
+#define TARGET_ADDX		XCHAL_HAVE_ADDX
+
+/* Macros controlled by command-line options.  */
 #define TARGET_NO_FUSED_MADD	(target_flags & MASK_NO_FUSED_MADD)
 #define TARGET_CONST16		(target_flags & MASK_CONST16)
-#define TARGET_ABS		(target_flags & MASK_ABS)
-#define TARGET_ADDX		(target_flags & MASK_ADDX)
-
-/* Default target_flags if no switches are specified  */
 
 #define TARGET_DEFAULT (						\
-  (XCHAL_HAVE_BE	? MASK_BIG_ENDIAN : 0) |			\
-  (XCHAL_HAVE_DENSITY	? MASK_DENSITY : 0) |				\
-  (XCHAL_HAVE_L32R	? 0 : MASK_CONST16) |				\
-  (XCHAL_HAVE_ABS	? MASK_ABS : 0) |				\
-  (XCHAL_HAVE_ADDX	? MASK_ADDX : 0) |				\
-  (XCHAL_HAVE_MAC16	? MASK_MAC16 : 0) |				\
-  (XCHAL_HAVE_MUL16	? MASK_MUL16 : 0) |				\
-  (XCHAL_HAVE_MUL32	? MASK_MUL32 : 0) |				\
-  (XCHAL_HAVE_DIV32	? MASK_DIV32 : 0) |				\
-  (XCHAL_HAVE_NSA	? MASK_NSA : 0) |				\
-  (XCHAL_HAVE_MINMAX	? MASK_MINMAX : 0) |				\
-  (XCHAL_HAVE_SEXT	? MASK_SEXT : 0) |				\
-  (XCHAL_HAVE_BOOLEANS	? MASK_BOOLEANS : 0) |				\
-  (XCHAL_HAVE_FP	? MASK_HARD_FLOAT : 0) |			\
-  (XCHAL_HAVE_FP_DIV	? MASK_HARD_FLOAT_DIV : 0) |			\
-  (XCHAL_HAVE_FP_RECIP	? MASK_HARD_FLOAT_RECIP : 0) |			\
-  (XCHAL_HAVE_FP_SQRT	? MASK_HARD_FLOAT_SQRT : 0) |			\
-  (XCHAL_HAVE_FP_RSQRT	? MASK_HARD_FLOAT_RSQRT : 0))
-
-/* Macro to define tables used to set the flags.  */
+  (XCHAL_HAVE_L32R	? 0 : MASK_CONST16))
 
 #define TARGET_SWITCHES							\
 {									\
-  {"big-endian",		MASK_BIG_ENDIAN,			\
-    N_("Use big-endian byte order")},					\
-  {"little-endian",		-MASK_BIG_ENDIAN,			\
-    N_("Use little-endian byte order")},				\
-  {"density",			MASK_DENSITY,				\
-    N_("Use the Xtensa code density option")},				\
-  {"no-density",		-MASK_DENSITY,				\
-    N_("Do not use the Xtensa code density option")},			\
   {"const16",			MASK_CONST16,				\
     N_("Use CONST16 instruction to load constants")},			\
   {"no-const16",		-MASK_CONST16,				\
     N_("Use PC-relative L32R instruction to load constants")},		\
-  {"abs",			MASK_ABS,				\
-    N_("Use the Xtensa ABS instruction")},				\
-  {"no-abs",			-MASK_ABS,				\
-    N_("Do not use the Xtensa ABS instruction")},			\
-  {"addx",			MASK_ADDX,				\
-    N_("Use the Xtensa ADDX and SUBX instructions")},			\
-  {"no-addx",			-MASK_ADDX,				\
-    N_("Do not use the Xtensa ADDX and SUBX instructions")},		\
-  {"mac16",			MASK_MAC16,				\
-    N_("Use the Xtensa MAC16 option")},					\
-  {"no-mac16",			-MASK_MAC16,				\
-    N_("Do not use the Xtensa MAC16 option")},				\
-  {"mul16",			MASK_MUL16,				\
-    N_("Use the Xtensa MUL16 option")},					\
-  {"no-mul16",			-MASK_MUL16,				\
-    N_("Do not use the Xtensa MUL16 option")},				\
-  {"mul32",			MASK_MUL32,				\
-    N_("Use the Xtensa MUL32 option")},					\
-  {"no-mul32",			-MASK_MUL32,				\
-    N_("Do not use the Xtensa MUL32 option")},				\
-  {"div32",			MASK_DIV32,				\
-    0 /* undocumented */},						\
-  {"no-div32",			-MASK_DIV32,				\
-    0 /* undocumented */},						\
-  {"nsa",			MASK_NSA,				\
-    N_("Use the Xtensa NSA option")},					\
-  {"no-nsa",			-MASK_NSA,				\
-    N_("Do not use the Xtensa NSA option")},				\
-  {"minmax",			MASK_MINMAX,				\
-    N_("Use the Xtensa MIN/MAX option")},				\
-  {"no-minmax",			-MASK_MINMAX,				\
-    N_("Do not use the Xtensa MIN/MAX option")},			\
-  {"sext",			MASK_SEXT,				\
-    N_("Use the Xtensa SEXT option")},					\
-  {"no-sext",			-MASK_SEXT,				\
-    N_("Do not use the Xtensa SEXT option")},				\
-  {"booleans",			MASK_BOOLEANS,				\
-    N_("Use the Xtensa boolean register option")},			\
-  {"no-booleans",		-MASK_BOOLEANS,				\
-    N_("Do not use the Xtensa boolean register option")},		\
-  {"hard-float",		MASK_HARD_FLOAT,			\
-    N_("Use the Xtensa floating-point unit")},				\
-  {"soft-float",		-MASK_HARD_FLOAT,			\
-    N_("Do not use the Xtensa floating-point unit")},			\
-  {"hard-float-div",		MASK_HARD_FLOAT_DIV,			\
-    0 /* undocumented */},						\
-  {"no-hard-float-div",		-MASK_HARD_FLOAT_DIV,			\
-    0 /* undocumented */},						\
-  {"hard-float-recip",		MASK_HARD_FLOAT_RECIP,			\
-    0 /* undocumented */},						\
-  {"no-hard-float-recip",	-MASK_HARD_FLOAT_RECIP,			\
-    0 /* undocumented */},						\
-  {"hard-float-sqrt",		MASK_HARD_FLOAT_SQRT,			\
-    0 /* undocumented */},						\
-  {"no-hard-float-sqrt",	-MASK_HARD_FLOAT_SQRT,			\
-    0 /* undocumented */},						\
-  {"hard-float-rsqrt",		MASK_HARD_FLOAT_RSQRT,			\
-    0 /* undocumented */},						\
-  {"no-hard-float-rsqrt",	-MASK_HARD_FLOAT_RSQRT,			\
-    0 /* undocumented */},						\
   {"no-fused-madd",		MASK_NO_FUSED_MADD,			\
     N_("Disable fused multiply/add and multiply/subtract FP instructions")}, \
   {"fused-madd",		-MASK_NO_FUSED_MADD,			\
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index e174366..7637e15 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -637,19 +637,7 @@ in the following sections.
 @gccoptlist{-msim}
 
 @emph{Xtensa Options}
-@gccoptlist{-mbig-endian  -mlittle-endian @gol
--mdensity  -mno-density @gol
--mconst16 -mno-const16 @gol
--mabs -mno-abs @gol
--maddx -mno-addx @gol
--mmac16  -mno-mac16 @gol
--mmul16  -mno-mul16 @gol
--mmul32  -mno-mul32 @gol
--mnsa  -mno-nsa @gol
--mminmax  -mno-minmax @gol
--msext  -mno-sext @gol
--mbooleans  -mno-booleans @gol
--mhard-float  -msoft-float @gol
+@gccoptlist{-mconst16 -mno-const16 @gol
 -mfused-madd  -mno-fused-madd @gol
 -mtext-section-literals  -mno-text-section-literals @gol
 -mtarget-align  -mno-target-align @gol
@@ -10862,26 +10850,9 @@ Select the processor type for which to generate code.  Possible values are
 @subsection Xtensa Options
 @cindex Xtensa Options
 
-The Xtensa architecture is designed to support many different
-configurations.  The compiler's default options can be set to match a
-particular Xtensa configuration by copying a configuration file into the
-GCC sources when building GCC@.  The options below may be used to
-override the default options.
+These options are supported for Xtensa targets:
 
 @table @gcctabopt
-@item -mbig-endian
-@itemx -mlittle-endian
-@opindex mbig-endian
-@opindex mlittle-endian
-Specify big-endian or little-endian byte ordering for the target Xtensa
-processor.
-
-@item -mdensity
-@itemx -mno-density
-@opindex mdensity
-@opindex mno-density
-Enable or disable use of the optional Xtensa code density instructions.
-
 @item -mconst16
 @itemx -mno-const16
 @opindex mconst16
@@ -10893,95 +10864,6 @@ instructions are always used in place of the standard @code{L32R}
 instructions.  The use of @code{CONST16} is enabled by default only if
 the @code{L32R} instruction is not available.
 
-@item -mabs
-@itemx -mno-abs
-@opindex mabs
-@opindex mno-abs
-Enable or disable use of the Xtensa @code{ABS} instruction for absolute
-value operations.
-
-@item -maddx
-@itemx -mno-addx
-@opindex maddx
-@opindex mno-addx
-Enable or disable use of the Xtensa @code{ADDX} and @code{SUBX}
-instructions.
-
-@item -mmac16
-@itemx -mno-mac16
-@opindex mmac16
-@opindex mno-mac16
-Enable or disable use of the Xtensa MAC16 option.  When enabled, GCC
-will generate MAC16 instructions from standard C code, with the
-limitation that it will use neither the MR register file nor any
-instruction that operates on the MR registers.  When this option is
-disabled, GCC will translate 16-bit multiply/accumulate operations to a
-combination of core instructions and library calls, depending on whether
-any other multiplier options are enabled.
-
-@item -mmul16
-@itemx -mno-mul16
-@opindex mmul16
-@opindex mno-mul16
-Enable or disable use of the 16-bit integer multiplier option.  When
-enabled, the compiler will generate 16-bit multiply instructions for
-multiplications of 16 bits or smaller in standard C code.  When this
-option is disabled, the compiler will either use 32-bit multiply or
-MAC16 instructions if they are available or generate library calls to
-perform the multiply operations using shifts and adds.
-
-@item -mmul32
-@itemx -mno-mul32
-@opindex mmul32
-@opindex mno-mul32
-Enable or disable use of the 32-bit integer multiplier option.  When
-enabled, the compiler will generate 32-bit multiply instructions for
-multiplications of 32 bits or smaller in standard C code.  When this
-option is disabled, the compiler will generate library calls to perform
-the multiply operations using either shifts and adds or 16-bit multiply
-instructions if they are available.
-
-@item -mnsa
-@itemx -mno-nsa
-@opindex mnsa
-@opindex mno-nsa
-Enable or disable use of the optional normalization shift amount
-(@code{NSA}) instructions to implement the built-in @code{ffs} function.
-
-@item -mminmax
-@itemx -mno-minmax
-@opindex mminmax
-@opindex mno-minmax
-Enable or disable use of the optional minimum and maximum value
-instructions.
-
-@item -msext
-@itemx -mno-sext
-@opindex msext
-@opindex mno-sext
-Enable or disable use of the optional sign extend (@code{SEXT})
-instruction.
-
-@item -mbooleans
-@itemx -mno-booleans
-@opindex mbooleans
-@opindex mno-booleans
-Enable or disable support for the boolean register file used by Xtensa
-coprocessors.  This is not typically useful by itself but may be
-required for other options that make use of the boolean registers (e.g.,
-the floating-point option).
-
-@item -mhard-float
-@itemx -msoft-float
-@opindex mhard-float
-@opindex msoft-float
-Enable or disable use of the floating-point option.  When enabled, GCC
-generates floating-point instructions for 32-bit @code{float}
-operations.  When this option is disabled, GCC generates library calls
-to emulate 32-bit floating-point operations using integer instructions.
-Regardless of this option, 64-bit @code{double} operations are always
-emulated with calls to library functions.
-
 @item -mfused-madd
 @itemx -mno-fused-madd
 @opindex mfused-madd