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author | H.J. Lu <hongjiu.lu@intel.com> | 2018-01-14 14:41:25 +0000 |
---|---|---|
committer | H.J. Lu <hjl@gcc.gnu.org> | 2018-01-14 06:41:25 -0800 |
commit | 6abe11c1a3b9f86398134533560bdc57788a93c9 (patch) | |
tree | 3886085c187311388ba794ae35b93353a782f6af /gcc | |
parent | d543c04b795f8af4ebe5b3d5f38156ef4e5734f1 (diff) | |
download | gcc-6abe11c1a3b9f86398134533560bdc57788a93c9.zip gcc-6abe11c1a3b9f86398134533560bdc57788a93c9.tar.gz gcc-6abe11c1a3b9f86398134533560bdc57788a93c9.tar.bz2 |
x86: Add 'V' register operand modifier
Add 'V', a special modifier which prints the name of the full integer
register without '%'. For
extern void (*func_p) (void);
void
foo (void)
{
asm ("call __x86_indirect_thunk_%V0" : : "a" (func_p));
}
it generates:
foo:
movq func_p(%rip), %rax
call __x86_indirect_thunk_rax
ret
gcc/
* config/i386/i386.c (print_reg): Print the name of the full
integer register without '%'.
(ix86_print_operand): Handle 'V'.
* doc/extend.texi: Document 'V' modifier.
gcc/testsuite/
* gcc.target/i386/indirect-thunk-register-4.c: New test.
From-SVN: r256663
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 7 | ||||
-rw-r--r-- | gcc/config/i386/i386.c | 13 | ||||
-rw-r--r-- | gcc/doc/extend.texi | 3 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 4 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/i386/indirect-thunk-register-4.c | 13 |
5 files changed, 39 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2fb1c5a..75de1b7 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,12 @@ 2018-01-14 H.J. Lu <hongjiu.lu@intel.com> + * config/i386/i386.c (print_reg): Print the name of the full + integer register without '%'. + (ix86_print_operand): Handle 'V'. + * doc/extend.texi: Document 'V' modifier. + +2018-01-14 H.J. Lu <hongjiu.lu@intel.com> + * config/i386/constraints.md (Bs): Disallow memory operand for -mindirect-branch-register. (Bw): Likewise. diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index c6ffdd9..4ae8901 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -17655,6 +17655,7 @@ put_condition_code (enum rtx_code code, machine_mode mode, bool reverse, If CODE is 'h', pretend the reg is the 'high' byte register. If CODE is 'y', print "st(0)" instead of "st", if the reg is stack op. If CODE is 'd', duplicate the operand for AVX instruction. + If CODE is 'V', print naked full integer register name without %. */ void @@ -17665,7 +17666,7 @@ print_reg (rtx x, int code, FILE *file) unsigned int regno; bool duplicated; - if (ASSEMBLER_DIALECT == ASM_ATT) + if (ASSEMBLER_DIALECT == ASM_ATT && code != 'V') putc ('%', file); if (x == pc_rtx) @@ -17717,6 +17718,14 @@ print_reg (rtx x, int code, FILE *file) return; } + if (code == 'V') + { + if (GENERAL_REGNO_P (regno)) + msize = GET_MODE_SIZE (word_mode); + else + error ("'V' modifier on non-integer register"); + } + duplicated = code == 'd' && TARGET_AVX; switch (msize) @@ -17836,6 +17845,7 @@ print_reg (rtx x, int code, FILE *file) & -- print some in-use local-dynamic symbol name. H -- print a memory address offset by 8; used for sse high-parts Y -- print condition for XOP pcom* instruction. + V -- print naked full integer register name without %. + -- print a branch hint as 'cs' or 'ds' prefix ; -- print a semicolon (after prefixes due to bug in older gas). ~ -- print "i" if TARGET_AVX2, "f" otherwise. @@ -18059,6 +18069,7 @@ ix86_print_operand (FILE *file, rtx x, int code) case 'X': case 'P': case 'p': + case 'V': break; case 's': diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index f120b2a..dce808f 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -9292,6 +9292,9 @@ The table below shows the list of supported modifiers and their effects. @tab @code{2} @end multitable +@code{V} is a special modifier which prints the name of the full integer +register without @code{%}. + @anchor{x86floatingpointasmoperands} @subsubsection x86 Floating-Point @code{asm} Operands diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 796a329..9e3aeaf 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,5 +1,9 @@ 2018-01-14 H.J. Lu <hongjiu.lu@intel.com> + * gcc.target/i386/indirect-thunk-register-4.c: New test. + +2018-01-14 H.J. Lu <hongjiu.lu@intel.com> + * gcc.target/i386/indirect-thunk-1.c (dg-options): Add -mno-indirect-branch-register. * gcc.target/i386/indirect-thunk-2.c: Likewise. diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-register-4.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-register-4.c new file mode 100644 index 0000000..f0cd9b7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-register-4.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mindirect-branch=keep -fno-pic" } */ + +extern void (*func_p) (void); + +void +foo (void) +{ + asm("call __x86_indirect_thunk_%V0" : : "a" (func_p)); +} + +/* { dg-final { scan-assembler "call\[ \t\]*__x86_indirect_thunk_eax" { target ia32 } } } */ +/* { dg-final { scan-assembler "call\[ \t\]*__x86_indirect_thunk_rax" { target { ! ia32 } } } } */ |