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| author | Uros Bizjak <uros@gcc.gnu.org> | 2011-11-14 23:27:13 +0100 |
|---|---|---|
| committer | Uros Bizjak <uros@gcc.gnu.org> | 2011-11-14 23:27:13 +0100 |
| commit | 674a3581477f9d0c8f802e242eed89aa53b95032 (patch) | |
| tree | c2adec622b76b33f31cddbcc16db11093a4b17ec /gcc | |
| parent | 5c262e9444e555c78381c008c3fabd2637e57859 (diff) | |
| download | gcc-674a3581477f9d0c8f802e242eed89aa53b95032.zip gcc-674a3581477f9d0c8f802e242eed89aa53b95032.tar.gz gcc-674a3581477f9d0c8f802e242eed89aa53b95032.tar.bz2 | |
sse.md (round<mode>2): Use register_operand for operand 1 predicate.
* config/i386/sse.md (round<mode>2): Use register_operand for
operand 1 predicate.
(round<mode>2_sfix): Ditto.
(round<mode>2_vec_pack_sfix): Ditto for operand 1 and operand 2.
From-SVN: r181369
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/i386/sse.md | 8 |
2 files changed, 12 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 94661b5..539d836 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,9 +1,17 @@ +2011-11-14 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/sse.md (round<mode>2): Use register_operand for + operand 1 predicate. + (round<mode>2_sfix): Ditto. + (round<mode>2_vec_pack_sfix): Ditto for operand 1 and operand 2. + 2011-11-14 Nathan Sidwell <nathan@acm.org> * gcov.c (canonicalize_name): Protect use of S_ISLNK. 2011-11-14 Jan Hubicka <jh@suse.cz> + PR target/51126 * config/i386/i386.c (core cost model): Correct pasto. 2011-11-14 Uros Bizjak <ubizjak@gmail.com> diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 147646b..b476752 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -9965,7 +9965,7 @@ (define_expand "round<mode>2" [(set (match_dup 4) (plus:VF - (match_operand:VF 1 "nonimmediate_operand" "") + (match_operand:VF 1 "register_operand" "") (match_dup 3))) (set (match_operand:VF 0 "register_operand" "") (unspec:VF @@ -9998,7 +9998,7 @@ (define_expand "round<mode>2_sfix" [(match_operand:<sseintvecmode> 0 "register_operand" "") - (match_operand:VF1 1 "nonimmediate_operand" "")] + (match_operand:VF1 1 "register_operand" "")] "TARGET_ROUND && !flag_trapping_math" { rtx tmp = gen_reg_rtx (<MODE>mode); @@ -10012,8 +10012,8 @@ (define_expand "round<mode>2_vec_pack_sfix" [(match_operand:<ssepackfltmode> 0 "register_operand" "") - (match_operand:VF2 1 "nonimmediate_operand" "") - (match_operand:VF2 2 "nonimmediate_operand" "")] + (match_operand:VF2 1 "register_operand" "") + (match_operand:VF2 2 "register_operand" "")] "TARGET_ROUND && !flag_trapping_math" { rtx tmp0, tmp1; |