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authorPan Li <pan2.li@intel.com>2024-11-21 14:30:47 +0800
committerPan Li <pan2.li@intel.com>2024-11-24 15:49:19 +0800
commit630565843a7e29101327bd16df98089b80d5c31e (patch)
treef0e0af29d438ae78e4406adee0c9be749336025d /gcc
parent847b4b0ef473a37f9a6793da7c9af96928463e97 (diff)
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RISC-V: Rearrange the test files for all other vector SAT ALU [NFC]
Move all other test files of SAT ALU to riscv/rvv/autovec/sat/. It is test only patch and obvious up to a point, will commit it directly if no comments in next 48H. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-1-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-1-i32.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-1-i64.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-1-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-2-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-2-i32.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-2-i64.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-2-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-3-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-3-i32.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-3-i64.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-3-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-4-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-4-i32.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-4-i64.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-4-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-1-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-1-i16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-1-i32.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-1-i32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-1-i64.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-1-i64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-1-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-1-i8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-2-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-2-i16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-2-i32.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-2-i32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-2-i64.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-2-i64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-2-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-2-i8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-3-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-3-i16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-3-i32.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-3-i32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-3-i64.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-3-i64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-3-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-3-i8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-4-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-4-i16.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-4-i32.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-4-i32.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-4-i64.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-4-i64.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-4-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-4-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i16-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i16-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i32-to-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i32-to-i16.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i32-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i32-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i64-to-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i16.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i64-to-i32.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i32.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i64-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-2-i16-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i16-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-2-i32-to-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i32-to-i16.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-2-i32-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i32-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-2-i64-to-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i16.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-2-i64-to-i32.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i32.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-2-i64-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-3-i16-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i16-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-3-i32-to-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i32-to-i16.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-3-i32-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i32-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-3-i64-to-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i16.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-3-i64-to-i32.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i32.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-3-i64-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-4-i16-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i16-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-4-i32-to-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i32-to-i16.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-4-i32-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i32-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-4-i64-to-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i16.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-4-i64-to-i32.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i32.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-4-i64-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-5-i16-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i16-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-5-i32-to-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i32-to-i16.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-5-i32-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i32-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-5-i64-to-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i16.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-5-i64-to-i32.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i32.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-5-i64-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-6-i16-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i16-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-6-i32-to-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i32-to-i16.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-6-i32-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i32-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-6-i64-to-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i16.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-6-i64-to-i32.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i32.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-6-i64-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-7-i16-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i16-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-7-i32-to-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i32-to-i16.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-7-i32-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i32-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-7-i64-to-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i16.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-7-i64-to-i32.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i32.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-7-i64-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-8-i16-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i16-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-8-i32-to-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i32-to-i16.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-8-i32-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i32-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-8-i64-to-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i16.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-8-i64-to-i32.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i32.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-8-i64-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i16-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i16-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i32-to-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i32-to-i16.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i32-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i32-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i64-to-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i64-to-i16.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i64-to-i32.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i64-to-i32.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i64-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i64-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-2-i16-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i16-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-2-i32-to-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i32-to-i16.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-2-i32-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i32-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-2-i64-to-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i64-to-i16.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-2-i64-to-i32.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i64-to-i32.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-2-i64-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i64-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-3-i16-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i16-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-3-i32-to-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i32-to-i16.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-3-i32-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i32-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-3-i64-to-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i64-to-i16.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-3-i64-to-i32.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i64-to-i32.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-3-i64-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i64-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-4-i16-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i16-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-4-i32-to-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i32-to-i16.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-4-i32-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i32-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-4-i64-to-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i64-to-i16.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-4-i64-to-i32.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i64-to-i32.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-4-i64-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i64-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-5-i16-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i16-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-5-i32-to-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i32-to-i16.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-5-i32-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i32-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-5-i64-to-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i64-to-i16.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-5-i64-to-i32.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i64-to-i32.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-5-i64-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i64-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-6-i16-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i16-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-6-i32-to-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i32-to-i16.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-6-i32-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i32-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-6-i64-to-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i64-to-i16.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-6-i64-to-i32.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i64-to-i32.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-6-i64-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i64-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-7-i16-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i16-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-7-i32-to-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i32-to-i16.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-7-i32-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i32-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-7-i64-to-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i64-to-i16.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-7-i64-to-i32.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i64-to-i32.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-7-i64-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i64-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-8-i16-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i16-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-8-i32-to-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i32-to-i16.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-8-i32-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i32-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-8-i64-to-i16.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i64-to-i16.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-8-i64-to-i32.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i64-to-i32.c: ...here. * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-8-i64-to-i8.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i64-to-i8.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_zip-run.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_zip-run.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_zip.c: Move to... * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_zip.c: ...here. * gcc.target/riscv/rvv/autovec/binop/vec_sat_binary_vvv_run.h: Removed. * gcc.target/riscv/rvv/autovec/binop/vec_sat_binary_vvx_run.h: Removed. * gcc.target/riscv/rvv/autovec/binop/vec_sat_binary_vx_run.h: Removed. * gcc.target/riscv/rvv/autovec/binop/vec_sat_data.h: Removed. * gcc.target/riscv/rvv/autovec/unop/vec_sat_data.h: Removed. * gcc.target/riscv/rvv/autovec/unop/vec_sat_unary_vv_run.h: Removed. Signed-off-by: Pan Li <pan2.li@intel.com>
Diffstat (limited to 'gcc')
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_binary_vvv_run.h33
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_binary_vvx_run.h27
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_binary_vx_run.h23
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_data.h1105
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i16.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-1-i16.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i32.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-1-i32.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i64.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-1-i64.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i8.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-1-i8.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i16.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-2-i16.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i32.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-2-i32.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i64.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-2-i64.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i8.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-2-i8.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i16.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-3-i16.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i32.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-3-i32.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i64.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-3-i64.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i8.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-3-i8.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i16.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-4-i16.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i32.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-4-i32.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i64.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-4-i64.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i8.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-4-i8.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-1-i16.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-1-i16.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-1-i32.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-1-i32.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-1-i64.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-1-i64.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-1-i8.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-1-i8.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-2-i16.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-2-i16.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-2-i32.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-2-i32.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-2-i64.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-2-i64.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-2-i8.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-2-i8.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-3-i16.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-3-i16.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-3-i32.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-3-i32.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-3-i64.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-3-i64.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-3-i8.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-3-i8.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-4-i16.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-4-i16.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-4-i32.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-4-i32.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-4-i64.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-4-i64.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-4-i8.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-4-i8.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i16-to-i8.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i16-to-i8.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i32-to-i16.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i32-to-i16.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i32-to-i8.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i32-to-i8.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i16.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i64-to-i16.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i32.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i64-to-i32.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i8.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i64-to-i8.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i16-to-i8.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-2-i16-to-i8.c)0
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-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i64-to-i32.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-7-i64-to-i32.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i64-to-i8.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-7-i64-to-i8.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i16-to-i8.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-8-i16-to-i8.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i32-to-i16.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-8-i32-to-i16.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i32-to-i8.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-8-i32-to-i8.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i64-to-i16.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-8-i64-to-i16.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i64-to-i32.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-8-i64-to-i32.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i64-to-i8.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-8-i64-to-i8.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_zip-run.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_zip-run.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_zip.c (renamed from gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_zip.c)0
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_data.h685
-rw-r--r--gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_unary_vv_run.h23
136 files changed, 0 insertions, 1896 deletions
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_binary_vvv_run.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_binary_vvv_run.h
deleted file mode 100644
index a61482a..0000000
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_binary_vvv_run.h
+++ /dev/null
@@ -1,33 +0,0 @@
-#ifndef HAVE_DEFINED_VEC_SAT_BINARY_VVV_RUN_H
-#define HAVE_DEFINED_VEC_SAT_BINARY_VVV_RUN_H
-
-/* To leverage this header files for run test, you need to:
- 1. define T as the type, for example uint8_t,
- 2. defint N as the test array size, for example 16.
- 3. define RUN_VEC_SAT_BINARY as run function.
- 4. prepare the test_data for test cases.
- */
-
-int
-main ()
-{
- unsigned i, k;
- T out[N];
-
- for (i = 0; i < sizeof (test_data) / sizeof (test_data[0]); i++)
- {
- T *op_1 = test_data[i][0];
- T *op_2 = test_data[i][1];
- T *expect = test_data[i][2];
-
- RUN_VEC_SAT_BINARY (T, out, op_1, op_2, N);
-
- for (k = 0; k < N; k++)
- if (out[k] != expect[k])
- __builtin_abort ();
- }
-
- return 0;
-}
-
-#endif
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_binary_vvx_run.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_binary_vvx_run.h
deleted file mode 100644
index 90a0033..0000000
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_binary_vvx_run.h
+++ /dev/null
@@ -1,27 +0,0 @@
-#ifndef HAVE_DEFINED_VEC_SAT_BINARY_VVX_RUN_H
-#define HAVE_DEFINED_VEC_SAT_BINARY_VVX_RUN_H
-
-int
-main ()
-{
- unsigned i, k;
- OUT_T out[N];
-
- for (i = 0; i < sizeof (expect_data) / sizeof (expect_data[0]); i++)
- {
- IN_T *op_1 = op_1_data[i];
- IN_T op_2 = op_2_data[i];
- OUT_T *expect = expect_data[i];
-
- RUN_VEC_SAT_BINARY (OUT_T, IN_T, out, op_1, op_2, N);
-
- for (k = 0; k < N; k++)
- if (out[k] != expect[k])
- __builtin_abort ();
- }
-
- return 0;
-}
-
-#endif
-
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_binary_vx_run.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_binary_vx_run.h
deleted file mode 100644
index 10c08e0..0000000
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_binary_vx_run.h
+++ /dev/null
@@ -1,23 +0,0 @@
-#ifndef HAVE_DEFINED_VEC_SAT_BINARY_VX_RUN_H
-#define HAVE_DEFINED_VEC_SAT_BINARY_VX_RUN_H
-
-int
-main ()
-{
- unsigned i, k;
- T d;
-
- for (i = 0; i < sizeof (DATA) / sizeof (DATA[0]); i++)
- {
- d = DATA[i];
- RUN_BINARY_VX (&d.x[N], d.b, N);
-
- for (k = 0; k < N; k++)
- if (d.x[k] != d.expect[k])
- __builtin_abort ();
- }
-
- return 0;
-}
-
-#endif
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_data.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_data.h
deleted file mode 100644
index bcb4a3f..0000000
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_data.h
+++ /dev/null
@@ -1,1105 +0,0 @@
-#ifndef HAVE_DEFINE_VEC_SAT_DATA_H
-#define HAVE_DEFINE_VEC_SAT_DATA_H
-
-#define N 16
-#define TEST_UNARY_DATA(T, NAME) test_##T##_##NAME##_data
-#define TEST_UNARY_DATA_WRAP(T, NAME) TEST_UNARY_DATA(T, NAME)
-
-uint8_t TEST_UNARY_DATA(uint8_t, sat_u_add_imm)[][2][N] =
-{
- { /* For add imm 0 */
- {
- 0, 1, 5, 255,
- 0, 1, 5, 255,
- 0, 1, 5, 255,
- 0, 1, 5, 255,
- },
- {
- 0, 1, 5, 255,
- 0, 1, 5, 255,
- 0, 1, 5, 255,
- 0, 1, 5, 255,
- },
- },
- { /* For add imm 1 */
- {
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- },
- {
- 1, 2, 1, 9,
- 1, 2, 1, 9,
- 1, 2, 1, 9,
- 1, 2, 1, 9,
- },
- },
- { /* For add imm 254 */
- {
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- },
- {
- 254, 255, 254, 255,
- 254, 255, 254, 255,
- 254, 255, 254, 255,
- 254, 255, 254, 255,
- },
- },
- { /* For add imm 255 */
- {
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- },
- {
- 255, 255, 255, 255,
- 255, 255, 255, 255,
- 255, 255, 255, 255,
- 255, 255, 255, 255,
- },
- },
-};
-
-uint16_t TEST_UNARY_DATA(uint16_t, sat_u_add_imm)[][2][N] =
-{
- { /* For add imm 0 */
- {
- 0, 1, 5, 65535,
- 0, 1, 5, 65535,
- 0, 1, 5, 65535,
- 0, 1, 5, 65535,
- },
- {
- 0, 1, 5, 65535,
- 0, 1, 5, 65535,
- 0, 1, 5, 65535,
- 0, 1, 5, 65535,
- },
- },
- { /* For add imm 1 */
- {
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- },
- {
- 1, 2, 1, 9,
- 1, 2, 1, 9,
- 1, 2, 1, 9,
- 1, 2, 1, 9,
- },
- },
- { /* For add imm 65534 */
- {
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- },
- {
- 65534, 65535, 65534, 65535,
- 65534, 65535, 65534, 65535,
- 65534, 65535, 65534, 65535,
- 65534, 65535, 65534, 65535,
- },
- },
- { /* For add imm 65535 */
- {
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- },
- {
- 65535, 65535, 65535, 65535,
- 65535, 65535, 65535, 65535,
- 65535, 65535, 65535, 65535,
- 65535, 65535, 65535, 65535,
- },
- },
-};
-
-uint32_t TEST_UNARY_DATA(uint32_t, sat_u_add_imm)[][2][N] =
-{
- { /* For add imm 0 */
- {
- 0, 1, 5, 4294967295,
- 0, 1, 5, 4294967295,
- 0, 1, 5, 4294967295,
- 0, 1, 5, 4294967295,
- },
- {
- 0, 1, 5, 4294967295,
- 0, 1, 5, 4294967295,
- 0, 1, 5, 4294967295,
- 0, 1, 5, 4294967295,
- },
- },
- { /* For add imm 1 */
- {
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- },
- {
- 1, 2, 1, 9,
- 1, 2, 1, 9,
- 1, 2, 1, 9,
- 1, 2, 1, 9,
- },
- },
- { /* For add imm 4294967294 */
- {
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- },
- {
- 4294967294, 4294967295, 4294967294, 4294967295,
- 4294967294, 4294967295, 4294967294, 4294967295,
- 4294967294, 4294967295, 4294967294, 4294967295,
- 4294967294, 4294967295, 4294967294, 4294967295,
- },
- },
- { /* For add imm 4294967295 */
- {
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- },
- {
- 4294967295, 4294967295, 4294967295, 4294967295,
- 4294967295, 4294967295, 4294967295, 4294967295,
- 4294967295, 4294967295, 4294967295, 4294967295,
- 4294967295, 4294967295, 4294967295, 4294967295,
- },
- },
-};
-
-uint64_t TEST_UNARY_DATA(uint64_t, sat_u_add_imm)[][2][N] =
-{
- { /* For add imm 0 */
- {
- 0, 1, 5, 18446744073709551615u,
- 0, 1, 5, 18446744073709551615u,
- 0, 1, 5, 18446744073709551615u,
- 0, 1, 5, 18446744073709551615u,
- },
- {
- 0, 1, 5, 18446744073709551615u,
- 0, 1, 5, 18446744073709551615u,
- 0, 1, 5, 18446744073709551615u,
- 0, 1, 5, 18446744073709551615u,
- },
- },
- { /* For add imm 1 */
- {
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- },
- {
- 1, 2, 1, 9,
- 1, 2, 1, 9,
- 1, 2, 1, 9,
- 1, 2, 1, 9,
- },
- },
- { /* For add imm 18446744073709551614 */
- {
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- },
- {
- 18446744073709551614u, 18446744073709551615u,
- 18446744073709551614u, 18446744073709551615u,
- 18446744073709551614u, 18446744073709551615u,
- 18446744073709551614u, 18446744073709551615u,
- 18446744073709551614u, 18446744073709551615u,
- 18446744073709551614u, 18446744073709551615u,
- 18446744073709551614u, 18446744073709551615u,
- 18446744073709551614u, 18446744073709551615u,
- },
- },
- { /* For add imm 18446744073709551615 */
- {
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- 0, 1, 0, 8,
- },
- {
- 18446744073709551615u, 18446744073709551615u,
- 18446744073709551615u, 18446744073709551615u,
- 18446744073709551615u, 18446744073709551615u,
- 18446744073709551615u, 18446744073709551615u,
- 18446744073709551615u, 18446744073709551615u,
- 18446744073709551615u, 18446744073709551615u,
- 18446744073709551615u, 18446744073709551615u,
- 18446744073709551615u, 18446744073709551615u,
- },
- },
-};
-
-uint8_t TEST_UNARY_DATA(uint8_t, sat_u_sub_imm)[][2][N] =
-{
- { /* For sub imm 0 */
- {
- 0, 1, 5, 255,
- 0, 1, 5, 255,
- 0, 1, 5, 255,
- 0, 1, 5, 255,
- },
- {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- },
- },
- { /* For sub imm 1 */
- {
- 0, 1, 2, 8,
- 0, 1, 2, 8,
- 0, 1, 2, 8,
- 0, 1, 2, 8,
- },
- {
- 1, 0, 0, 0,
- 1, 0, 0, 0,
- 1, 0, 0, 0,
- 1, 0, 0, 0,
- },
- },
- { /* For sub imm 254 */
- {
- 0, 1, 254, 255,
- 0, 1, 254, 255,
- 0, 1, 254, 255,
- 0, 1, 254, 255,
- },
- {
- 254, 253, 0, 0,
- 254, 253, 0, 0,
- 254, 253, 0, 0,
- 254, 253, 0, 0,
- },
- },
- { /* For sub imm 255 */
- {
- 0, 1, 5, 255,
- 0, 1, 5, 255,
- 0, 1, 5, 255,
- 0, 1, 5, 255,
- },
- {
- 255, 254, 250, 0,
- 255, 254, 250, 0,
- 255, 254, 250, 0,
- 255, 254, 250, 0,
- },
- },
-};
-
-uint16_t TEST_UNARY_DATA(uint16_t, sat_u_sub_imm)[][2][N] =
-{
- { /* For sub imm 0 */
- {
- 0, 1, 5, 65535,
- 0, 1, 5, 65535,
- 0, 1, 5, 65535,
- 0, 1, 5, 65535,
- },
- {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- },
- },
- { /* For sub imm 1 */
- {
- 0, 1, 5, 8,
- 0, 1, 5, 8,
- 0, 1, 5, 8,
- 0, 1, 5, 8,
- },
- {
- 1, 0, 0, 0,
- 1, 0, 0, 0,
- 1, 0, 0, 0,
- 1, 0, 0, 0,
- },
- },
- { /* For sub imm 65534 */
- {
- 0, 1, 65534, 65535,
- 0, 1, 65534, 65535,
- 0, 1, 65534, 65535,
- 0, 1, 65534, 65535,
- },
- {
- 65534, 65533, 0, 0,
- 65534, 65533, 0, 0,
- 65534, 65533, 0, 0,
- 65534, 65533, 0, 0,
- },
- },
- { /* For sub imm 65535 */
- {
- 0, 1, 65534, 65535,
- 0, 1, 65534, 65535,
- 0, 1, 65534, 65535,
- 0, 1, 65534, 65535,
- },
- {
- 65535, 65534, 1, 0,
- 65535, 65534, 1, 0,
- 65535, 65534, 1, 0,
- 65535, 65534, 1, 0,
- },
- },
-};
-
-uint32_t TEST_UNARY_DATA(uint32_t, sat_u_sub_imm)[][2][N] =
-{
- { /* For sub imm 0 */
- {
- 0, 1, 5, 4294967295,
- 0, 1, 5, 4294967295,
- 0, 1, 5, 4294967295,
- 0, 1, 5, 4294967295,
- },
- {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- },
- },
- { /* For sub imm 1 */
- {
- 0, 1, 5, 8,
- 0, 1, 5, 8,
- 0, 1, 5, 8,
- 0, 1, 5, 8,
- },
- {
- 1, 0, 0, 0,
- 1, 0, 0, 0,
- 1, 0, 0, 0,
- 1, 0, 0, 0,
- },
- },
- { /* For sub imm 4294967294 */
- {
- 0, 1, 4294967294, 4294967295,
- 0, 1, 4294967294, 4294967295,
- 0, 1, 4294967294, 4294967295,
- 0, 1, 4294967294, 4294967295,
- },
- {
- 4294967294, 4294967293, 0, 0,
- 4294967294, 4294967293, 0, 0,
- 4294967294, 4294967293, 0, 0,
- 4294967294, 4294967293, 0, 0,
- },
- },
- { /* For sub imm 4294967295 */
- {
- 0, 1, 4294967294, 4294967295,
- 0, 1, 4294967294, 4294967295,
- 0, 1, 4294967294, 4294967295,
- 0, 1, 4294967294, 4294967295,
- },
- {
- 4294967295, 4294967294, 1, 0,
- 4294967295, 4294967294, 1, 0,
- 4294967295, 4294967294, 1, 0,
- 4294967295, 4294967294, 1, 0,
- },
- },
-};
-
-uint64_t TEST_UNARY_DATA(uint64_t, sat_u_sub_imm)[][2][N] =
-{
- { /* For sub imm 0 */
- {
- 0, 1, 5, 18446744073709551615u,
- 0, 1, 5, 18446744073709551615u,
- 0, 1, 5, 18446744073709551615u,
- 0, 1, 5, 18446744073709551615u,
- },
- {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- },
- },
- { /* For sub imm 1 */
- {
- 0, 1, 5, 8,
- 0, 1, 5, 8,
- 0, 1, 5, 8,
- 0, 1, 5, 8,
- },
- {
- 1, 0, 0, 0,
- 1, 0, 0, 0,
- 1, 0, 0, 0,
- 1, 0, 0, 0,
- },
- },
- { /* For sub imm 18446744073709551614 */
- {
- 0, 1, 18446744073709551614u, 18446744073709551615u,
- 0, 1, 18446744073709551614u, 18446744073709551615u,
- 0, 1, 18446744073709551614u, 18446744073709551615u,
- 0, 1, 18446744073709551614u, 18446744073709551615u,
- },
- {
- 18446744073709551614u, 18446744073709551613u, 0, 0,
- 18446744073709551614u, 18446744073709551613u, 0, 0,
- 18446744073709551614u, 18446744073709551613u, 0, 0,
- 18446744073709551614u, 18446744073709551613u, 0, 0,
- },
- },
- { /* For sub imm 18446744073709551615 */
- {
- 0, 1, 18446744073709551614u, 18446744073709551615u,
- 0, 1, 18446744073709551614u, 18446744073709551615u,
- 0, 1, 18446744073709551614u, 18446744073709551615u,
- 0, 1, 18446744073709551614u, 18446744073709551615u,
- },
- {
- 18446744073709551615u, 18446744073709551614u, 1, 0,
- 18446744073709551615u, 18446744073709551614u, 1, 0,
- 18446744073709551615u, 18446744073709551614u, 1, 0,
- 18446744073709551615u, 18446744073709551614u, 1, 0,
- },
- },
-};
-
-#define TEST_BINARY_DATA_NAME(T1, T2, NAME) test_bin_##T1##_##T2##_##NAME##_data
-#define TEST_BINARY_DATA_NAME_WRAP(T1, T2, NAME) \
- TEST_BINARY_DATA_NAME(T1, T2, NAME)
-
-#define TEST_ZIP_STRUCT_NAME(T1, T2) test_##T1##_##T2##_zip_s
-#define TEST_ZIP_STRUCT_DECL(T1, T2) struct TEST_ZIP_STRUCT_NAME(T1, T2)
-#define TEST_ZIP_STRUCT(T1, T2) \
- TEST_ZIP_STRUCT_DECL(T1, T2) \
- { \
- T1 x[N]; \
- T2 b; \
- T1 expect[N]; \
- };
-
-TEST_ZIP_STRUCT (uint16_t, uint32_t)
-
-TEST_ZIP_STRUCT_DECL(uint16_t, uint32_t) \
- TEST_BINARY_DATA_NAME(uint16_t, uint32_t, zip)[] =
-{
- {
- { /* x. */
- 1, 1, 1, 1,
- 1, 1, 1, 1,
- 1, 1, 1, 1,
- 0, 0, 0, 0,
- },
- 1, /* b. */
- { /* expect. */
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- },
- },
- {
- { /* x. */
- 65535, 1, 2, 8,
- 65535, 1, 2, 8,
- 65535, 1, 2, 8,
- 65535, 1, 2, 8,
- },
- 65536, /* b. */
- { /* expect. */
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- },
- },
- {
- { /* x. */
- 65535, 16, 8, 1,
- 65535, 16, 8, 1,
- 65535, 16, 8, 1,
- 65535, 16, 8, 1,
- },
- 65535, /* b. */
- { /* expect. */
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- },
- },
- {
- { /* x. */
- 65535, 16, 8, 1,
- 65535, 16, 8, 1,
- 65535, 16, 8, 1,
- 65535, 16, 8, 1,
- },
- 65500, /* b. */
- { /* expect. */
- 35, 0, 0, 0,
- 35, 0, 0, 0,
- 35, 0, 0, 0,
- 35, 0, 0, 0,
- },
- },
-};
-
-int8_t TEST_BINARY_DATA_NAME(int8_t, int8_t, ssadd)[][3][N] =
-{
- {
- {
- 0, 0, 0, 0,
- 2, 2, 2, 2,
- 126, 126, 126, 126,
- 127, 127, 127, 127,
- },
- {
- 0, 0, 0, 0,
- 2, 2, 2, 2,
- 1, 1, 1, 1,
- 1, 1, 1, 1,
- },
- {
- 0, 0, 0, 0,
- 4, 4, 4, 4,
- 127, 127, 127, 127,
- 127, 127, 127, 127,
- },
- },
-
- {
- {
- -7, -7, -7, -7,
- -128, -128, -128, -128,
- -127, -127, -127, -127,
- -128, -128, -128, -128,
- },
- {
- -4, -4, -4, -4,
- -1, -1, -1, -1,
- -1, -1, -1, -1,
- -128, -128, -128, -128,
- },
- {
- -11, -11, -11, -11,
- -128, -128, -128, -128,
- -128, -128, -128, -128,
- -128, -128, -128, -128,
- },
- },
-
- {
- {
- -128, -128, -128, -128,
- -127, -127, -127, -127,
- -122, -122, -122, -122,
- -122, -122, -122, -122,
- },
- {
- 127, 127, 127, 127,
- 127, 127, 127, 127,
- 105, 105, 105, 105,
- 125, 125, 125, 125,
- },
- {
- -1, -1, -1, -1,
- 0, 0, 0, 0,
- -17, -17, -17, -17,
- 3, 3, 3, 3,
- },
- },
-};
-
-int16_t TEST_BINARY_DATA_NAME(int16_t, int16_t, ssadd)[][3][N] =
-{
- {
- {
- 0, 0, 0, 0,
- 2, 2, 2, 2,
- 32766, 32766, 32766, 32766,
- 32767, 32767, 32767, 32767,
- },
- {
- 0, 0, 0, 0,
- 2, 2, 2, 2,
- 1, 1, 1, 1,
- 1, 1, 1, 1,
- },
- {
- 0, 0, 0, 0,
- 4, 4, 4, 4,
- 32767, 32767, 32767, 32767,
- 32767, 32767, 32767, 32767,
- },
- },
-
- {
- {
- -7, -7, -7, -7,
- -32768, -32768, -32768, -32768,
- -32767, -32767, -32767, -32767,
- -32768, -32768, -32768, -32768,
- },
- {
- -4, -4, -4, -4,
- -1, -1, -1, -1,
- -1, -1, -1, -1,
- -32768, -32768, -32768, -32768,
- },
- {
- -11, -11, -11, -11,
- -32768, -32768, -32768, -32768,
- -32768, -32768, -32768, -32768,
- -32768, -32768, -32768, -32768,
- },
- },
-
- {
- {
- -32768, -32768, -32768, -32768,
- -32767, -32767, -32767, -32767,
- -32762, -32762, -32762, -32762,
- -32762, -32762, -32762, -32762,
- },
- {
- 32767, 32767, 32767, 32767,
- 32767, 32767, 32767, 32767,
- 32745, 32745, 32745, 32745,
- 32765, 32765, 32765, 32765,
- },
- {
- -1, -1, -1, -1,
- 0, 0, 0, 0,
- -17, -17, -17, -17,
- 3, 3, 3, 3,
- },
- },
-};
-
-int32_t TEST_BINARY_DATA_NAME(int32_t, int32_t, ssadd)[][3][N] =
-{
- {
- {
- 0, 0, 0, 0,
- 2, 2, 2, 2,
- 2147483646, 2147483646, 2147483646, 2147483646,
- 2147483647, 2147483647, 2147483647, 2147483647,
- },
- {
- 0, 0, 0, 0,
- 2, 2, 2, 2,
- 1, 1, 1, 1,
- 1, 1, 1, 1,
- },
- {
- 0, 0, 0, 0,
- 4, 4, 4, 4,
- 2147483647, 2147483647, 2147483647, 2147483647,
- 2147483647, 2147483647, 2147483647, 2147483647,
- },
- },
-
- {
- {
- -7, -7, -7, -7,
- -2147483648, -2147483648, -2147483648, -2147483648,
- -2147483647, -2147483647, -2147483647, -2147483647,
- -2147483648, -2147483648, -2147483648, -2147483648,
- },
- {
- -4, -4, -4, -4,
- -1, -1, -1, -1,
- -1, -1, -1, -1,
- -2147483648, -2147483648, -2147483648, -2147483648,
- },
- {
- -11, -11, -11, -11,
- -2147483648, -2147483648, -2147483648, -2147483648,
- -2147483648, -2147483648, -2147483648, -2147483648,
- -2147483648, -2147483648, -2147483648, -2147483648,
- },
- },
-
- {
- {
- -2147483648, -2147483648, -2147483648, -2147483648,
- -2147483647, -2147483647, -2147483647, -2147483647,
- -2147483642, -2147483642, -2147483642, -2147483642,
- -2147483642, -2147483642, -2147483642, -2147483642,
- },
- {
- 2147483647, 2147483647, 2147483647, 2147483647,
- 2147483647, 2147483647, 2147483647, 2147483647,
- 2147483625, 2147483625, 2147483625, 2147483625,
- 2147483645, 2147483645, 2147483645, 2147483645,
- },
- {
- -1, -1, -1, -1,
- 0, 0, 0, 0,
- -17, -17, -17, -17,
- 3, 3, 3, 3,
- },
- },
-};
-
-int64_t TEST_BINARY_DATA_NAME(int64_t, int64_t, ssadd)[][3][N] =
-{
- {
- {
- 0, 0, 0, 0,
- 2, 2, 2, 2,
- 9223372036854775806ll, 9223372036854775806ll, 9223372036854775806ll, 9223372036854775806ll,
- 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll,
- },
- {
- 0, 0, 0, 0,
- 2, 2, 2, 2,
- 1, 1, 1, 1,
- 1, 1, 1, 1,
- },
- {
- 0, 0, 0, 0,
- 4, 4, 4, 4,
- 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll,
- 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll,
- },
- },
-
- {
- {
- -7, -7, -7, -7,
- -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull,
- -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll,
- -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull,
- },
- {
- -4, -4, -4, -4,
- -1, -1, -1, -1,
- -1, -1, -1, -1,
- -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull,
- },
- {
- -11, -11, -11, -11,
- -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull,
- -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull,
- -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull,
- },
- },
-
- {
- {
- -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull,
- -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll,
- -9223372036854775802ll, -9223372036854775802ll, -9223372036854775802ll, -9223372036854775802ll,
- -9223372036854775802ll, -9223372036854775802ll, -9223372036854775802ll, -9223372036854775802ll,
- },
- {
- 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll,
- 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll,
- 9223372036854775785ll, 9223372036854775785ll, 9223372036854775785ll, 9223372036854775785ll,
- 9223372036854775805ll, 9223372036854775805ll, 9223372036854775805ll, 9223372036854775805ll,
- },
- {
- -1, -1, -1, -1,
- 0, 0, 0, 0,
- -17, -17, -17, -17,
- 3, 3, 3, 3,
- },
- },
-};
-
-int8_t TEST_BINARY_DATA_NAME(int8_t, int8_t, sssub)[][3][N] =
-{
- {
- {
- 0, 0, 0, 0,
- 2, 2, 2, 2,
- 126, 126, 126, 126,
- 127, 127, 127, 127,
- },
- {
- 0, 0, 0, 0,
- 4, 4, 4, 4,
- -2, -2, -2, -2,
- -127, -127, -127, -127,
- },
- {
- 0, 0, 0, 0,
- -2, -2, -2, -2,
- 127, 127, 127, 127,
- 127, 127, 127, 127,
- },
- },
-
- {
- {
- -7, -7, -7, -7,
- -128, -128, -128, -128,
- -127, -127, -127, -127,
- -128, -128, -128, -128,
- },
- {
- -4, -4, -4, -4,
- 1, 1, 1, 1,
- 1, 1, 1, 1,
- 127, 127, 127, 127,
- },
- {
- -3, -3, -3, -3,
- -128, -128, -128, -128,
- -128, -128, -128, -128,
- -128, -128, -128, -128,
- },
- },
-
- {
- {
- -128, -128, -128, -128,
- 127, 127, 127, 127,
- -125, -125, -125, -125,
- 126, 126, 126, 126,
- },
- {
- 127, 127, 127, 127,
- -127, -127, -127, -127,
- -127, -127, -127, -127,
- 127, 127, 127, 127,
- },
- {
- -128, -128, -128, -128,
- 127, 127, 127, 127,
- 2, 2, 2, 2,
- -1, -1, -1, -1,
- },
- },
-};
-
-int16_t TEST_BINARY_DATA_NAME(int16_t, int16_t, sssub)[][3][N] =
-{
- {
- {
- 0, 0, 0, 0,
- 2, 2, 2, 2,
- 32766, 32766, 32766, 32766,
- 32767, 32767, 32767, 32767,
- },
- {
- 0, 0, 0, 0,
- 4, 4, 4, 4,
- -2, -2, -2, -2,
- -32767, -32767, -32767, -32767,
- },
- {
- 0, 0, 0, 0,
- -2, -2, -2, -2,
- 32767, 32767, 32767, 32767,
- 32767, 32767, 32767, 32767,
- },
- },
-
- {
- {
- -7, -7, -7, -7,
- -32768, -32768, -32768, -32768,
- -32767, -32767, -32767, -32767,
- -32768, -32768, -32768, -32768,
- },
- {
- -4, -4, -4, -4,
- 1, 1, 1, 1,
- 1, 1, 1, 1,
- 32767, 32767, 32767, 32767,
- },
- {
- -3, -3, -3, -3,
- -32768, -32768, -32768, -32768,
- -32768, -32768, -32768, -32768,
- -32768, -32768, -32768, -32768,
- },
- },
-
- {
- {
- -32768, -32768, -32768, -32768,
- 32767, 32767, 32767, 32767,
- -32765, -32765, -32765, -32765,
- 32766, 32766, 32766, 32766,
- },
- {
- 32767, 32767, 32767, 32767,
- -32767, -32767, -32767, -32767,
- -32767, -32767, -32767, -32767,
- 32767, 32767, 32767, 32767,
- },
- {
- -32768, -32768, -32768, -32768,
- 32767, 32767, 32767, 32767,
- 2, 2, 2, 2,
- -1, -1, -1, -1,
- },
- },
-};
-
-int32_t TEST_BINARY_DATA_NAME(int32_t, int32_t, sssub)[][3][N] =
-{
- {
- {
- 0, 0, 0, 0,
- 2, 2, 2, 2,
- 2147483646, 2147483646, 2147483646, 2147483646,
- 2147483647, 2147483647, 2147483647, 2147483647,
- },
- {
- 0, 0, 0, 0,
- 4, 4, 4, 4,
- -2, -2, -2, -2,
- -2147483647, -2147483647, -2147483647, -2147483647,
- },
- {
- 0, 0, 0, 0,
- -2, -2, -2, -2,
- 2147483647, 2147483647, 2147483647, 2147483647,
- 2147483647, 2147483647, 2147483647, 2147483647,
- },
- },
-
- {
- {
- -7, -7, -7, -7,
- -2147483648, -2147483648, -2147483648, -2147483648,
- -2147483647, -2147483647, -2147483647, -2147483647,
- -2147483648, -2147483648, -2147483648, -2147483648,
- },
- {
- -4, -4, -4, -4,
- 1, 1, 1, 1,
- 1, 1, 1, 1,
- 2147483647, 2147483647, 2147483647, 2147483647,
- },
- {
- -3, -3, -3, -3,
- -2147483648, -2147483648, -2147483648, -2147483648,
- -2147483648, -2147483648, -2147483648, -2147483648,
- -2147483648, -2147483648, -2147483648, -2147483648,
- },
- },
-
- {
- {
- -2147483648, -2147483648, -2147483648, -2147483648,
- 2147483647, 2147483647, 2147483647, 2147483647,
- -2147483645, -2147483645, -2147483645, -2147483645,
- 2147483646, 2147483646, 2147483646, 2147483646,
- },
- {
- 2147483647, 2147483647, 2147483647, 2147483647,
- -2147483647, -2147483647, -2147483647, -2147483647,
- -2147483647, -2147483647, -2147483647, -2147483647,
- 2147483647, 2147483647, 2147483647, 2147483647,
- },
- {
- -2147483648, -2147483648, -2147483648, -2147483648,
- 2147483647, 2147483647, 2147483647, 2147483647,
- 2, 2, 2, 2,
- -1, -1, -1, -1,
- },
- },
-};
-
-int64_t TEST_BINARY_DATA_NAME(int64_t, int64_t, sssub)[][3][N] =
-{
- {
- {
- 0, 0, 0, 0,
- 2, 2, 2, 2,
- 9223372036854775806ll, 9223372036854775806ll, 9223372036854775806ll, 9223372036854775806ll,
- 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll,
- },
- {
- 0, 0, 0, 0,
- 4, 4, 4, 4,
- -2, -2, -2, -2,
- -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll,
- },
- {
- 0, 0, 0, 0,
- -2, -2, -2, -2,
- 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll,
- 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll,
- },
- },
-
- {
- {
- -7, -7, -7, -7,
- -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull,
- -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll,
- -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull,
- },
- {
- -4, -4, -4, -4,
- 1, 1, 1, 1,
- 1, 1, 1, 1,
- 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll,
- },
- {
- -3, -3, -3, -3,
- -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull,
- -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull,
- -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull,
- },
- },
-
- {
- {
- -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull,
- 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll,
- -9223372036854775805ll, -9223372036854775805ll, -9223372036854775805ll, -9223372036854775805ll,
- 9223372036854775806ll, 9223372036854775806ll, 9223372036854775806ll, 9223372036854775806ll,
- },
- {
- 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll,
- -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll,
- -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll,
- 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll,
- },
- {
- -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull,
- 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll,
- 2, 2, 2, 2,
- -1, -1, -1, -1,
- },
- },
-};
-
-#endif
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-1-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i16.c
index 12d8c01..12d8c01 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-1-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-1-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i32.c
index 338e415..338e415 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-1-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i32.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-1-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i64.c
index 83ccd4b..83ccd4b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-1-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i64.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-1-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i8.c
index 06b4104..06b4104 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-1-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-2-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i16.c
index dec0359..dec0359 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-2-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-2-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i32.c
index 72b2d67..72b2d67 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-2-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i32.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-2-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i64.c
index 3ca4458..3ca4458 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-2-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i64.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-2-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i8.c
index e3a7bfc..e3a7bfc 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-2-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-3-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i16.c
index c10dc09..c10dc09 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-3-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-3-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i32.c
index d1352ed..d1352ed 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-3-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i32.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-3-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i64.c
index b86887d..b86887d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-3-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i64.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-3-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i8.c
index 79ce8dc..79ce8dc 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-3-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-4-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i16.c
index 4497f0c..4497f0c 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-4-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-4-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i32.c
index 9f06e6a..9f06e6a 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-4-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i32.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-4-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i64.c
index e806fd0..e806fd0 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-4-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i64.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-4-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i8.c
index 254bb18..254bb18 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-4-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-1-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-1-i16.c
index 7dc8e10..7dc8e10 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-1-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-1-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-1-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-1-i32.c
index b304cd6..b304cd6 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-1-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-1-i32.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-1-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-1-i64.c
index 228c5a8..228c5a8 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-1-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-1-i64.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-1-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-1-i8.c
index af40837..af40837 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-1-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-1-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-2-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-2-i16.c
index 89cd450..89cd450 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-2-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-2-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-2-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-2-i32.c
index aa91300..aa91300 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-2-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-2-i32.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-2-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-2-i64.c
index 0610703..0610703 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-2-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-2-i64.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-2-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-2-i8.c
index 3b2a24d..3b2a24d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-2-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-2-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-3-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-3-i16.c
index 9e26214..9e26214 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-3-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-3-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-3-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-3-i32.c
index ed6bc57..ed6bc57 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-3-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-3-i32.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-3-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-3-i64.c
index d62a4a7..d62a4a7 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-3-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-3-i64.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-3-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-3-i8.c
index 56b0f22..56b0f22 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-3-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-3-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-4-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-4-i16.c
index 974fd40..974fd40 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-4-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-4-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-4-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-4-i32.c
index 375a59b..375a59b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-4-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-4-i32.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-4-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-4-i64.c
index 2a301ec..2a301ec 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-4-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-4-i64.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-4-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-4-i8.c
index 51dd327..51dd327 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-4-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-4-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i16-to-i8.c
index dd87dfd..dd87dfd 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i16-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i32-to-i16.c
index caf646f..caf646f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i32-to-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i32-to-i8.c
index f06267a..f06267a 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i32-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i16.c
index f784937..f784937 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i32.c
index 1e5289c..1e5289c 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i32.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i8.c
index 2fb604b..2fb604b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-2-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i16-to-i8.c
index 3e26e78..3e26e78 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-2-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i16-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-2-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i32-to-i16.c
index 6379770..6379770 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-2-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i32-to-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-2-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i32-to-i8.c
index aa996f3..aa996f3 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-2-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i32-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-2-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i16.c
index 2a15556..2a15556 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-2-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-2-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i32.c
index d9649fc..d9649fc 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-2-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i32.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-2-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i8.c
index 1ad2b3f..1ad2b3f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-2-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-3-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i16-to-i8.c
index 392366d..392366d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-3-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i16-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-3-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i32-to-i16.c
index 2b16049..2b16049 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-3-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i32-to-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-3-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i32-to-i8.c
index b444d2e..b444d2e 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-3-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i32-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-3-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i16.c
index 0660658..0660658 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-3-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-3-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i32.c
index 72ec727..72ec727 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-3-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i32.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-3-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i8.c
index 7915d54..7915d54 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-3-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-4-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i16-to-i8.c
index 2ac96aa..2ac96aa 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-4-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i16-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-4-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i32-to-i16.c
index 7fe8f27..7fe8f27 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-4-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i32-to-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-4-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i32-to-i8.c
index 9650056..9650056 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-4-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i32-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-4-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i16.c
index b1ed04f..b1ed04f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-4-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-4-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i32.c
index 94afc44..94afc44 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-4-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i32.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-4-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i8.c
index 483c9e8..483c9e8 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-4-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-5-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i16-to-i8.c
index 49c076a..49c076a 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-5-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i16-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-5-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i32-to-i16.c
index a2a1aa4..a2a1aa4 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-5-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i32-to-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-5-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i32-to-i8.c
index ba09734..ba09734 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-5-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i32-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-5-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i16.c
index 7bc191d..7bc191d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-5-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-5-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i32.c
index b896cbe..b896cbe 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-5-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i32.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-5-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i8.c
index 67477e5..67477e5 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-5-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-6-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i16-to-i8.c
index c970573..c970573 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-6-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i16-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-6-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i32-to-i16.c
index 629c073..629c073 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-6-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i32-to-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-6-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i32-to-i8.c
index c70c832..c70c832 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-6-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i32-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-6-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i16.c
index d1967ba..d1967ba 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-6-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-6-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i32.c
index 8e2625f..8e2625f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-6-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i32.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-6-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i8.c
index b75a82e..b75a82e 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-6-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-7-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i16-to-i8.c
index a6eb2d5..a6eb2d5 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-7-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i16-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-7-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i32-to-i16.c
index fd01c74..fd01c74 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-7-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i32-to-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-7-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i32-to-i8.c
index 6af6153..6af6153 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-7-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i32-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-7-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i16.c
index aee896e..aee896e 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-7-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-7-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i32.c
index ce3ca80..ce3ca80 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-7-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i32.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-7-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i8.c
index b3cb744..b3cb744 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-7-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-8-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i16-to-i8.c
index 64f140f..64f140f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-8-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i16-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-8-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i32-to-i16.c
index 9bd95a5..9bd95a5 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-8-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i32-to-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-8-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i32-to-i8.c
index 0cb9d77..0cb9d77 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-8-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i32-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-8-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i16.c
index 8d766e3..8d766e3 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-8-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-8-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i32.c
index 98ede14..98ede14 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-8-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i32.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-8-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i8.c
index 2d9870f..2d9870f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-8-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i16-to-i8.c
index 508cf34..508cf34 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i16-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i32-to-i16.c
index 3b7c3b6..3b7c3b6 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i32-to-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i32-to-i8.c
index 508cf34..508cf34 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i32-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i64-to-i16.c
index 4a049ce..4a049ce 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i64-to-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i64-to-i32.c
index 15b6670..15b6670 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i64-to-i32.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i64-to-i8.c
index 5a1dd85..5a1dd85 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i64-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-2-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i16-to-i8.c
index a98447d..a98447d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-2-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i16-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-2-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i32-to-i16.c
index 93f40b6..93f40b6 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-2-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i32-to-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-2-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i32-to-i8.c
index a98447d..a98447d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-2-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i32-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-2-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i64-to-i16.c
index c946ac3..c946ac3 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-2-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i64-to-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-2-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i64-to-i32.c
index 1d3b034..1d3b034 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-2-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i64-to-i32.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-2-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i64-to-i8.c
index 98a637e..98a637e 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-2-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i64-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-3-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i16-to-i8.c
index 0b658f3..0b658f3 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-3-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i16-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-3-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i32-to-i16.c
index 41e1789..41e1789 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-3-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i32-to-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-3-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i32-to-i8.c
index 0b658f3..0b658f3 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-3-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i32-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-3-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i64-to-i16.c
index 28cd5c8..28cd5c8 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-3-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i64-to-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-3-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i64-to-i32.c
index a6501f9..a6501f9 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-3-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i64-to-i32.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-3-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i64-to-i8.c
index eef36e8..eef36e8 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-3-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i64-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-4-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i16-to-i8.c
index d07b736..d07b736 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-4-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i16-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-4-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i32-to-i16.c
index 06afa3f..06afa3f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-4-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i32-to-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-4-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i32-to-i8.c
index d07b736..d07b736 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-4-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i32-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-4-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i64-to-i16.c
index de26b5c..de26b5c 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-4-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i64-to-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-4-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i64-to-i32.c
index c1907f7..c1907f7 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-4-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i64-to-i32.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-4-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i64-to-i8.c
index 645d764..645d764 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-4-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i64-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-5-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i16-to-i8.c
index c2b7b7b..c2b7b7b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-5-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i16-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-5-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i32-to-i16.c
index 238e0d7..238e0d7 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-5-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i32-to-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-5-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i32-to-i8.c
index c2b7b7b..c2b7b7b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-5-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i32-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-5-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i64-to-i16.c
index e5ef086..e5ef086 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-5-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i64-to-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-5-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i64-to-i32.c
index 61158ef..61158ef 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-5-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i64-to-i32.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-5-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i64-to-i8.c
index b688c11..b688c11 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-5-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i64-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-6-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i16-to-i8.c
index 457abd6..457abd6 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-6-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i16-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-6-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i32-to-i16.c
index 694a771..694a771 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-6-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i32-to-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-6-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i32-to-i8.c
index 457abd6..457abd6 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-6-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i32-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-6-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i64-to-i16.c
index 6fb64a3..6fb64a3 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-6-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i64-to-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-6-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i64-to-i32.c
index 0c8bc74..0c8bc74 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-6-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i64-to-i32.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-6-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i64-to-i8.c
index 3c4513c..3c4513c 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-6-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i64-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-7-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i16-to-i8.c
index 53c0464..53c0464 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-7-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i16-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-7-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i32-to-i16.c
index 132de83..132de83 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-7-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i32-to-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-7-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i32-to-i8.c
index 53c0464..53c0464 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-7-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i32-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-7-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i64-to-i16.c
index 3747149..3747149 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-7-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i64-to-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-7-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i64-to-i32.c
index 8a85d40..8a85d40 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-7-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i64-to-i32.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-7-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i64-to-i8.c
index 11f758f..11f758f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-7-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i64-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-8-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i16-to-i8.c
index 4964599..4964599 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-8-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i16-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-8-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i32-to-i16.c
index 6c424b2..6c424b2 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-8-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i32-to-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-8-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i32-to-i8.c
index 4964599..4964599 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-8-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i32-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-8-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i64-to-i16.c
index e7b6cdb..e7b6cdb 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-8-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i64-to-i16.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-8-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i64-to-i32.c
index 02456e9..02456e9 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-8-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i64-to-i32.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-8-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i64-to-i8.c
index 23cc7f0..23cc7f0 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-8-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i64-to-i8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_zip-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_zip-run.c
index 63d2391..63d2391 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_zip-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_zip-run.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_zip.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_zip.c
index 16ff0c6..16ff0c6 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_zip.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_zip.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_data.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_data.h
deleted file mode 100644
index a3643c5..0000000
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_data.h
+++ /dev/null
@@ -1,685 +0,0 @@
-#ifndef HAVE_DEFINE_VEC_SAT_DATA_H
-#define HAVE_DEFINE_VEC_SAT_DATA_H
-
-#define N 16
-
-#define TEST_UNARY_STRUCT_NAME(T1, T2) test_##T1##_##T2##_s
-#define TEST_UNARY_STRUCT_DECL(T1, T2) struct TEST_UNARY_STRUCT_NAME(T1, T2)
-#define TEST_UNARY_STRUCT(T1, T2) \
- struct TEST_UNARY_STRUCT_NAME(T1, T2) \
- { \
- T2 in[N]; \
- T1 expect[N]; \
- T1 out[N]; \
- };
-
-#define TEST_UNARY_DATA(T1, T2) test_##T1##_##T2##_data
-#define TEST_UNARY_DATA_WRAP(T1, T2) TEST_UNARY_DATA(T1, T2)
-
-TEST_UNARY_STRUCT(uint8_t, uint16_t)
-TEST_UNARY_STRUCT(uint8_t, uint32_t)
-TEST_UNARY_STRUCT(uint8_t, uint64_t)
-
-TEST_UNARY_STRUCT(uint16_t, uint32_t)
-TEST_UNARY_STRUCT(uint16_t, uint64_t)
-
-TEST_UNARY_STRUCT(uint32_t, uint64_t)
-
-TEST_UNARY_STRUCT(int8_t, int16_t)
-TEST_UNARY_STRUCT(int8_t, int32_t)
-TEST_UNARY_STRUCT(int8_t, int64_t)
-
-TEST_UNARY_STRUCT(int16_t, int32_t)
-TEST_UNARY_STRUCT(int16_t, int64_t)
-
-TEST_UNARY_STRUCT(int32_t, int64_t)
-
-TEST_UNARY_STRUCT_DECL(uint8_t, uint16_t) \
- TEST_UNARY_DATA(uint8_t, uint16_t)[] =
-{
- {
- {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- },
- {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- },
- },
- {
- {
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- },
- {
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- },
- },
- {
- {
- 254, 255, 256, 257,
- 254, 255, 256, 257,
- 254, 255, 256, 257,
- 254, 255, 256, 257,
- },
- {
- 254, 255, 255, 255,
- 254, 255, 255, 255,
- 254, 255, 255, 255,
- 254, 255, 255, 255,
- },
- },
- {
- {
- 65534, 65535, 650, 24,
- 65534, 65535, 650, 24,
- 65534, 65535, 650, 24,
- 65534, 65535, 650, 24,
- },
- {
- 255, 255, 255, 24,
- 255, 255, 255, 24,
- 255, 255, 255, 24,
- 255, 255, 255, 24,
- },
- },
-};
-
-TEST_UNARY_STRUCT_DECL(uint8_t, uint32_t) \
- TEST_UNARY_DATA(uint8_t, uint32_t)[] =
-{
- {
- {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- },
- {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- },
- },
- {
- {
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- },
- {
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- },
- },
- {
- {
- 254, 255, 256, 257,
- 254, 255, 256, 257,
- 254, 255, 256, 257,
- 254, 255, 256, 257,
- },
- {
- 254, 255, 255, 255,
- 254, 255, 255, 255,
- 254, 255, 255, 255,
- 254, 255, 255, 255,
- },
- },
- {
- {
- 65534, 65535, 65536, 4294967291,
- 65534, 65535, 65537, 4294967292,
- 65534, 65535, 65538, 4294967293,
- 65534, 65535, 65539, 4294967294,
- },
- {
- 255, 255, 255, 255,
- 255, 255, 255, 255,
- 255, 255, 255, 255,
- 255, 255, 255, 255,
- },
- },
-};
-
-TEST_UNARY_STRUCT_DECL(uint8_t, uint64_t) \
- TEST_UNARY_DATA(uint8_t, uint64_t)[] =
-{
- {
- {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- },
- {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- },
- },
- {
- {
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- },
- {
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- },
- },
- {
- {
- 254, 255, 256, 257,
- 254, 255, 256, 257,
- 254, 255, 256, 257,
- 254, 255, 256, 257,
- },
- {
- 254, 255, 255, 255,
- 254, 255, 255, 255,
- 254, 255, 255, 255,
- 254, 255, 255, 255,
- },
- },
- {
- {
- 65534, 65535, 4294967292, 4294967296,
- 65534, 65536, 4294967293, 18446744073709551613u,
- 65534, 65537, 4294967294, 18446744073709551614u,
- 65534, 65538, 4294967295, 18446744073709551615u,
- },
- {
- 255, 255, 255, 255,
- 255, 255, 255, 255,
- 255, 255, 255, 255,
- 255, 255, 255, 255,
- },
- },
-};
-
-TEST_UNARY_STRUCT_DECL(uint16_t, uint32_t) \
- TEST_UNARY_DATA(uint16_t, uint32_t)[] =
-{
- {
- {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- },
- {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- },
- },
- {
- {
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- },
- {
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- },
- },
- {
- {
- 65534, 65535, 65536, 65537,
- 65534, 65535, 65536, 65537,
- 65534, 65535, 65536, 65537,
- 65534, 65535, 65536, 65537,
- },
- {
- 65534, 65535, 65535, 65535,
- 65534, 65535, 65535, 65535,
- 65534, 65535, 65535, 65535,
- 65534, 65535, 65535, 65535,
- },
- },
- {
- {
- 65534, 65535, 4294967295, 4294967291,
- 65534, 65535, 4294967295, 4294967292,
- 65534, 65535, 4294967295, 4294967293,
- 65534, 65535, 4294967295, 4294967294,
- },
- {
- 65534, 65535, 65535, 65535,
- 65534, 65535, 65535, 65535,
- 65534, 65535, 65535, 65535,
- 65534, 65535, 65535, 65535,
- },
- },
-};
-
-TEST_UNARY_STRUCT_DECL(uint16_t, uint64_t) \
- TEST_UNARY_DATA(uint16_t, uint64_t)[] =
-{
- {
- {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- },
- {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- },
- },
- {
- {
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- },
- {
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- },
- },
- {
- {
- 65534, 65535, 65536, 65537,
- 65534, 65535, 65536, 65537,
- 65534, 65535, 65536, 65537,
- 65534, 65535, 65536, 65537,
- },
- {
- 65534, 65535, 65535, 65535,
- 65534, 65535, 65535, 65535,
- 65534, 65535, 65535, 65535,
- 65534, 65535, 65535, 65535,
- },
- },
- {
- {
- 65534, 65535, 4294967294, 4294967298,
- 65534, 65536, 4294967295, 18446744073709551613u,
- 65534, 65537, 4294967296, 18446744073709551614u,
- 65534, 65538, 4294967297, 18446744073709551615u,
- },
- {
- 65534, 65535, 65535, 65535,
- 65534, 65535, 65535, 65535,
- 65534, 65535, 65535, 65535,
- 65534, 65535, 65535, 65535,
- },
- },
-};
-
-TEST_UNARY_STRUCT_DECL(uint32_t, uint64_t) \
- TEST_UNARY_DATA(uint32_t, uint64_t)[] =
-{
- {
- {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- },
- {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- },
- },
- {
- {
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- },
- {
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- 1, 2, 3, 4,
- },
- },
- {
- {
- 65534, 65535, 65536, 65537,
- 65534, 65535, 65536, 65537,
- 65534, 65535, 65536, 65537,
- 65534, 65535, 65536, 65537,
- },
- {
- 65534, 65535, 65536, 65537,
- 65534, 65535, 65536, 65537,
- 65534, 65535, 65536, 65537,
- 65534, 65535, 65536, 65537,
- },
- },
- {
- {
- 65534, 65535, 4294967294, 4294967298,
- 65534, 65536, 4294967295, 18446744073709551613u,
- 65534, 65537, 4294967296, 18446744073709551614u,
- 65534, 65538, 4294967297, 18446744073709551615u,
- },
- {
- 65534, 65535, 4294967294, 4294967295,
- 65534, 65536, 4294967295, 4294967295,
- 65534, 65537, 4294967295, 4294967295,
- 65534, 65538, 4294967295, 4294967295,
- },
- },
-};
-
-TEST_UNARY_STRUCT_DECL(int8_t, int16_t) \
- TEST_UNARY_DATA(int8_t, int16_t)[] =
-{
- {
- {
- 0, 0, 0, 0,
- -1, -1, -1, -1,
- 1, 1, 1, 1,
- 2, 2, 2, 2,
- },
- {
- 0, 0, 0, 0,
- -1, -1, -1, -1,
- 1, 1, 1, 1,
- 2, 2, 2, 2,
- },
- },
- {
- {
- 127, 127, 127, 127,
- 128, 128, 128, 128,
- -128, -128, -128, -128,
- -129, -129, -129, -129,
- },
- {
- 127, 127, 127, 127,
- 127, 127, 127, 127,
- -128, -128, -128, -128,
- -128, -128, -128, -128,
- },
- },
- {
- {
- 32766, 32766, 32766, 32766,
- 32767, 32767, 32767, 32767,
- -32767, -32767, -32767, -32767,
- -32768, -32768, -32768, -32768,
- },
- {
- 127, 127, 127, 127,
- 127, 127, 127, 127,
- -128, -128, -128, -128,
- -128, -128, -128, -128,
- },
- },
-};
-
-TEST_UNARY_STRUCT_DECL(int8_t, int32_t) \
- TEST_UNARY_DATA(int8_t, int32_t)[] =
-{
- {
- {
- 0, 0, 0, 0,
- -1, -1, -1, -1,
- 1, 1, 1, 1,
- 2, 2, 2, 2,
- },
- {
- 0, 0, 0, 0,
- -1, -1, -1, -1,
- 1, 1, 1, 1,
- 2, 2, 2, 2,
- },
- },
- {
- {
- 127, 127, 127, 127,
- 128, 128, 128, 128,
- -128, -128, -128, -128,
- -129, -129, -129, -129,
- },
- {
- 127, 127, 127, 127,
- 127, 127, 127, 127,
- -128, -128, -128, -128,
- -128, -128, -128, -128,
- },
- },
- {
- {
- 2147483646, 2147483646, 2147483646, 2147483646,
- 2147483647, 2147483647, 2147483647, 2147483647,
- -2147483647, -2147483647, -2147483647, -2147483647,
- -2147483648, -2147483648, -2147483648, -2147483648,
- },
- {
- 127, 127, 127, 127,
- 127, 127, 127, 127,
- -128, -128, -128, -128,
- -128, -128, -128, -128,
- },
- },
-};
-
-TEST_UNARY_STRUCT_DECL(int8_t, int64_t) \
- TEST_UNARY_DATA(int8_t, int64_t)[] =
-{
- {
- {
- 0, 0, 0, 0,
- -1, -1, -1, -1,
- 1, 1, 1, 1,
- 2, 2, 2, 2,
- },
- {
- 0, 0, 0, 0,
- -1, -1, -1, -1,
- 1, 1, 1, 1,
- 2, 2, 2, 2,
- },
- },
- {
- {
- 127, 127, 127, 127,
- 128, 128, 128, 128,
- -128, -128, -128, -128,
- -129, -129, -129, -129,
- },
- {
- 127, 127, 127, 127,
- 127, 127, 127, 127,
- -128, -128, -128, -128,
- -128, -128, -128, -128,
- },
- },
- {
- {
- 9223372036854775806ll, 9223372036854775806ll, 9223372036854775806ll, 9223372036854775806ll,
- 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll,
- -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll,
- -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull,
- },
- {
- 127, 127, 127, 127,
- 127, 127, 127, 127,
- -128, -128, -128, -128,
- -128, -128, -128, -128,
- },
- },
-};
-
-TEST_UNARY_STRUCT_DECL(int16_t, int32_t) \
- TEST_UNARY_DATA(int16_t, int32_t)[] =
-{
- {
- {
- 0, 0, 0, 0,
- -1, -1, -1, -1,
- 1, 1, 1, 1,
- 2, 2, 2, 2,
- },
- {
- 0, 0, 0, 0,
- -1, -1, -1, -1,
- 1, 1, 1, 1,
- 2, 2, 2, 2,
- },
- },
- {
- {
- 32767, 32767, 32767, 32767,
- 32768, 32768, 32768, 32768,
- -32768, -32768, -32768, -32768,
- -32769, -32769, -32769, -32769,
- },
- {
- 32767, 32767, 32767, 32767,
- 32767, 32767, 32767, 32767,
- -32768, -32768, -32768, -32768,
- -32768, -32768, -32768, -32768,
- },
- },
- {
- {
- 2147483646, 2147483646, 2147483646, 2147483646,
- 2147483647, 2147483647, 2147483647, 2147483647,
- -2147483647, -2147483647, -2147483647, -2147483647,
- -2147483648, -2147483648, -2147483648, -2147483648,
- },
- {
- 32767, 32767, 32767, 32767,
- 32767, 32767, 32767, 32767,
- -32768, -32768, -32768, -32768,
- -32768, -32768, -32768, -32768,
- },
- },
-};
-
-TEST_UNARY_STRUCT_DECL(int16_t, int64_t) \
- TEST_UNARY_DATA(int16_t, int64_t)[] =
-{
- {
- {
- 0, 0, 0, 0,
- -1, -1, -1, -1,
- 1, 1, 1, 1,
- 2, 2, 2, 2,
- },
- {
- 0, 0, 0, 0,
- -1, -1, -1, -1,
- 1, 1, 1, 1,
- 2, 2, 2, 2,
- },
- },
- {
- {
- 32767, 32767, 32767, 32767,
- 32768, 32768, 32768, 32768,
- -32768, -32768, -32768, -32768,
- -32769, -32769, -32769, -32769,
- },
- {
- 32767, 32767, 32767, 32767,
- 32767, 32767, 32767, 32767,
- -32768, -32768, -32768, -32768,
- -32768, -32768, -32768, -32768,
- },
- },
- {
- {
- 9223372036854775806ll, 9223372036854775806ll, 9223372036854775806ll, 9223372036854775806ll,
- 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll,
- -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll,
- -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull,
- },
- {
- 32767, 32767, 32767, 32767,
- 32767, 32767, 32767, 32767,
- -32768, -32768, -32768, -32768,
- -32768, -32768, -32768, -32768,
- },
- },
-};
-
-TEST_UNARY_STRUCT_DECL(int32_t, int64_t) \
- TEST_UNARY_DATA(int32_t, int64_t)[] =
-{
- {
- {
- 0, 0, 0, 0,
- -1, -1, -1, -1,
- 1, 1, 1, 1,
- 2, 2, 2, 2,
- },
- {
- 0, 0, 0, 0,
- -1, -1, -1, -1,
- 1, 1, 1, 1,
- 2, 2, 2, 2,
- },
- },
- {
- {
- 2147483647, 2147483647, 2147483647, 2147483647,
- 2147483648, 2147483648, 2147483648, 2147483648,
- -2147483648, -2147483648, -2147483648, -2147483648,
- -2147483649, -2147483649, -2147483649, -2147483649,
- },
- {
- 2147483647, 2147483647, 2147483647, 2147483647,
- 2147483647, 2147483647, 2147483647, 2147483647,
- -2147483648, -2147483648, -2147483648, -2147483648,
- -2147483648, -2147483648, -2147483648, -2147483648,
- },
- },
- {
- {
- 9223372036854775806ll, 9223372036854775806ll, 9223372036854775806ll, 9223372036854775806ll,
- 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll,
- -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll,
- -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull,
- },
- {
- 2147483647, 2147483647, 2147483647, 2147483647,
- 2147483647, 2147483647, 2147483647, 2147483647,
- -2147483648, -2147483648, -2147483648, -2147483648,
- -2147483648, -2147483648, -2147483648, -2147483648,
- },
- },
-};
-
-#endif
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_unary_vv_run.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_unary_vv_run.h
deleted file mode 100644
index e731e9f..0000000
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_unary_vv_run.h
+++ /dev/null
@@ -1,23 +0,0 @@
-#ifndef HAVE_DEFINE_VEC_SAT_UNARY_VV_RUN_H
-#define HAVE_DEFINE_VEC_SAT_UNARY_VV_RUN_H
-
-int
-main ()
-{
- unsigned i, k;
-
- for (i = 0; i < sizeof (DATA) / sizeof (DATA[0]); i++)
- {
- T *data = &DATA[i];
-
- RUN_UNARY (data->out, data->in, N);
-
- for (k = 0; k < N; k++)
- if (data->out[k] != data->expect[k])
- __builtin_abort ();
- }
-
- return 0;
-}
-
-#endif
generated by cgit v1.1 at 2025-08-21 12:15:23 +0000