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| author | Chung-Ju Wu <jasonwucj@gmail.com> | 2018-03-17 13:06:12 +0000 |
|---|---|---|
| committer | Chung-Ju Wu <jasonwucj@gcc.gnu.org> | 2018-03-17 13:06:12 +0000 |
| commit | 5e6ae0ccbb98cbe8b17080f69b43be089acba2f5 (patch) | |
| tree | f282ead8e45d437452f0e40406072fd28fffd113 /gcc | |
| parent | 5af50159079d2f37118e4eaa6dd269be5d6e1506 (diff) | |
| download | gcc-5e6ae0ccbb98cbe8b17080f69b43be089acba2f5.zip gcc-5e6ae0ccbb98cbe8b17080f69b43be089acba2f5.tar.gz gcc-5e6ae0ccbb98cbe8b17080f69b43be089acba2f5.tar.bz2 | |
[NDS32] Implment ADJUST_REG_ALLOC_ORDER for performance requirement.
gcc/
* config/nds32/nds32-protos.h (nds32_adjust_reg_alloc_order): Declare.
* config/nds32/nds32.c (nds32_reg_alloc_order_for_speed): New array.
(nds32_adjust_reg_alloc_order): New function.
* config/nds32/nds32.h (ADJUST_REG_ALLOC_ORDER): Define.
Co-Authored-By: Kito Cheng <kito.cheng@gmail.com>
From-SVN: r258621
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/nds32/nds32-protos.h | 5 | ||||
| -rw-r--r-- | gcc/config/nds32/nds32.c | 31 | ||||
| -rw-r--r-- | gcc/config/nds32/nds32.h | 4 |
4 files changed, 48 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a0e056b..a1186fc 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2018-03-17 Chung-Ju Wu <jasonwucj@gmail.com> + Kito Cheng <kito.cheng@gmail.com> + + * config/nds32/nds32-protos.h (nds32_adjust_reg_alloc_order): Declare. + * config/nds32/nds32.c (nds32_reg_alloc_order_for_speed): New array. + (nds32_adjust_reg_alloc_order): New function. + * config/nds32/nds32.h (ADJUST_REG_ALLOC_ORDER): Define. + 2018-03-17 Kito Cheng <kito.cheng@gmail.com> * config/nds32/nds32.c (nds32_asm_output_mi_thunk, diff --git a/gcc/config/nds32/nds32-protos.h b/gcc/config/nds32/nds32-protos.h index fe2509b..6110500 100644 --- a/gcc/config/nds32/nds32-protos.h +++ b/gcc/config/nds32/nds32-protos.h @@ -26,6 +26,11 @@ extern void nds32_init_expanders (void); +/* Register Usage. */ + +/* -- Order of Allocation of Registers. */ +extern void nds32_adjust_reg_alloc_order (void); + /* Register Classes. */ extern enum reg_class nds32_regno_reg_class (int); diff --git a/gcc/config/nds32/nds32.c b/gcc/config/nds32/nds32.c index e0836d8..f405ea1 100644 --- a/gcc/config/nds32/nds32.c +++ b/gcc/config/nds32/nds32.c @@ -82,6 +82,18 @@ static const char * const nds32_intrinsic_register_names[] = "$PSW", "$IPSW", "$ITYPE", "$IPC" }; + +/* Defining register allocation order for performance. + We want to allocate callee-saved registers after others. + It may be used by nds32_adjust_reg_alloc_order(). */ +static const int nds32_reg_alloc_order_for_speed[] = +{ + 0, 1, 2, 3, 4, 5, 16, 17, + 18, 19, 20, 21, 22, 23, 24, 25, + 26, 27, 6, 7, 8, 9, 10, 11, + 12, 13, 14, 15 +}; + /* Defining target-specific uses of __attribute__. */ static const struct attribute_spec nds32_attribute_table[] = { @@ -2870,6 +2882,25 @@ nds32_init_expanders (void) /* Register Usage. */ +/* -- Order of Allocation of Registers. */ + +void +nds32_adjust_reg_alloc_order (void) +{ + const int nds32_reg_alloc_order[] = REG_ALLOC_ORDER; + + /* Copy the default register allocation order, which is designed + to optimize for code size. */ + memcpy(reg_alloc_order, nds32_reg_alloc_order, sizeof (reg_alloc_order)); + + /* Adjust few register allocation order when optimizing for speed. */ + if (!optimize_size) + { + memcpy (reg_alloc_order, nds32_reg_alloc_order_for_speed, + sizeof (nds32_reg_alloc_order_for_speed)); + } +} + /* -- How Values Fit in Registers. */ /* Implement TARGET_HARD_REGNO_MODE_OK. */ diff --git a/gcc/config/nds32/nds32.h b/gcc/config/nds32/nds32.h index dc40735..749a552 100644 --- a/gcc/config/nds32/nds32.h +++ b/gcc/config/nds32/nds32.h @@ -627,6 +627,10 @@ enum nds32_builtins 96, 97, 98, 99, 100, \ } +/* ADJUST_REG_ALLOC_ORDER is a macro which permits reg_alloc_order + to be rearranged based on optimizing for speed or size. */ +#define ADJUST_REG_ALLOC_ORDER nds32_adjust_reg_alloc_order () + /* Tell IRA to use the order we define rather than messing it up with its own cost calculations. */ #define HONOR_REG_ALLOC_ORDER optimize_size |