diff options
author | Haochen Jiang <haochen.jiang@intel.com> | 2023-08-17 14:25:53 +0800 |
---|---|---|
committer | Haochen Jiang <haochen.jiang@intel.com> | 2023-08-17 14:25:53 +0800 |
commit | 5ccdfd0870be168031f8902e1039e77be93b131a (patch) | |
tree | 4c1aea9f774480afbd5b08ccfd2f1715e8cdfb48 /gcc | |
parent | 0b20e0f17b47a86cddba68a2e016be0132ae9b0a (diff) | |
download | gcc-5ccdfd0870be168031f8902e1039e77be93b131a.zip gcc-5ccdfd0870be168031f8902e1039e77be93b131a.tar.gz gcc-5ccdfd0870be168031f8902e1039e77be93b131a.tar.bz2 |
[Patch 6/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins
gcc/testsuite/ChangeLog:
* gcc.target/i386/avx10_1-vextractf64x2-1.c: New test.
* gcc.target/i386/avx10_1-vextracti64x2-1.c: Ditto.
* gcc.target/i386/avx10_1-vfpclasspd-1.c: Ditto.
* gcc.target/i386/avx10_1-vfpclassps-1.c: Ditto.
* gcc.target/i386/avx10_1-vinsertf64x2-1.c: Ditto.
* gcc.target/i386/avx10_1-vinserti64x2-1.c: Ditto.
* gcc.target/i386/avx10_1-vrangepd-1.c: Ditto.
* gcc.target/i386/avx10_1-vrangeps-1.c: Ditto.
* gcc.target/i386/avx10_1-vreducepd-1.c: Ditto.
* gcc.target/i386/avx10_1-vreduceps-1.c: Ditto.
Diffstat (limited to 'gcc')
10 files changed, 227 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-vextractf64x2-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-vextractf64x2-1.c new file mode 100644 index 0000000..4c7e54d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-vextractf64x2-1.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "vextractf64x2\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+.{7}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vextractf64x2\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+.{7}\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vextractf64x2\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+.{7}\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ + +#include <immintrin.h> + +volatile __m256d x; +volatile __m128d y; + +void extern +avx10_1_test (void) +{ + y = _mm256_extractf64x2_pd (x, 1); + y = _mm256_mask_extractf64x2_pd (y, 2, x, 1); + y = _mm256_maskz_extractf64x2_pd (2, x, 1); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-vextracti64x2-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-vextracti64x2-1.c new file mode 100644 index 0000000..c0bd770 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-vextracti64x2-1.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "vextracti64x2\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+.{7}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vextracti64x2\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+.{7}\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vextracti64x2\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+.{7}\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m128i y; + +void extern +avx10_1_test (void) +{ + y = _mm256_extracti64x2_epi64 (x, 1); + y = _mm256_mask_extracti64x2_epi64 (y, 2, x, 1); + y = _mm256_maskz_extracti64x2_epi64 (2, x, 1); +} + diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-vfpclasspd-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-vfpclasspd-1.c new file mode 100644 index 0000000..806ba80 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-vfpclasspd-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "vfpclasspdy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclasspdx\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclasspdy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclasspdx\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ + +#include <immintrin.h> + +volatile __m256d x256; +volatile __m128d x128; +volatile __mmask8 m; + +void extern +avx10_1_test (void) +{ + m = _mm256_fpclass_pd_mask (x256, 13); + m = _mm_fpclass_pd_mask (x128, 13); + m = _mm256_mask_fpclass_pd_mask (2, x256, 13); + m = _mm_mask_fpclass_pd_mask (2, x128, 13); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-vfpclassps-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-vfpclassps-1.c new file mode 100644 index 0000000..174903c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-vfpclassps-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "vfpclasspsy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclasspsx\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclasspsy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vfpclasspsx\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ + +#include <immintrin.h> + +volatile __m256 x256; +volatile __m128 x128; +volatile __mmask8 m; + +void extern +avx10_1_test (void) +{ + m = _mm256_fpclass_ps_mask (x256, 13); + m = _mm_fpclass_ps_mask (x128, 13); + m = _mm256_mask_fpclass_ps_mask (2, x256, 13); + m = _mm_mask_fpclass_ps_mask (2, x128, 13); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-vinsertf64x2-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-vinsertf64x2-1.c new file mode 100644 index 0000000..5a19684 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-vinsertf64x2-1.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "vinsertf64x2\[^\n\]*ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vinsertf64x2\[^\n\]*ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vinsertf64x2\[^\n\]*ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ + +#include <immintrin.h> + +volatile __m256d x; +volatile __m128d y; + +void extern +avx10_1_test (void) +{ + x = _mm256_insertf64x2 (x, y, 1); + x = _mm256_mask_insertf64x2 (x, 2, x, y, 1); + x = _mm256_maskz_insertf64x2 (2, x, y, 1); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-vinserti64x2-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-vinserti64x2-1.c new file mode 100644 index 0000000..69ee06f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-vinserti64x2-1.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "vinserti64x2\[^\n\]*ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vinserti64x2\[^\n\]*ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vinserti64x2\[^\n\]*ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ + +#include <immintrin.h> + +volatile __m256i x; +volatile __m128i y; + +void extern +avx10_1_test (void) +{ + x = _mm256_inserti64x2 (x, y, 1); + x = _mm256_mask_inserti64x2 (x, 2, x, y, 1); + x = _mm256_maskz_inserti64x2 (2, x, y, 1); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-vrangepd-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-vrangepd-1.c new file mode 100644 index 0000000..995b6de --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-vrangepd-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "vrangepd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrangepd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrangepd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrangepd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrangepd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrangepd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ + +#include <immintrin.h> + +volatile __m256d y; +volatile __m128d x; +volatile __mmask8 m; + +void extern +avx10_1_test (void) +{ + y = _mm256_range_pd (y, y, 15); + x = _mm_range_pd (x, x, 15); + + y = _mm256_mask_range_pd (y, m, y, y, 15); + x = _mm_mask_range_pd (x, m, x, x, 15); + + y = _mm256_maskz_range_pd (m, y, y, 15); + x = _mm_maskz_range_pd (m, x, x, 15); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-vrangeps-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-vrangeps-1.c new file mode 100644 index 0000000..faf844a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-vrangeps-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "vrangeps\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrangeps\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrangeps\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrangeps\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrangeps\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vrangeps\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ + +#include <immintrin.h> + +volatile __m256 y; +volatile __m128 x; +volatile __mmask8 m; + +void extern +avx10_1_test (void) +{ + y = _mm256_range_ps (y, y, 15); + x = _mm_range_ps (x, x, 15); + + y = _mm256_mask_range_ps (y, m, y, y, 15); + x = _mm_mask_range_ps (x, m, x, x, 15); + + y = _mm256_maskz_range_ps (m, y, y, 15); + x = _mm_maskz_range_ps (m, x, x, 15); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-vreducepd-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-vreducepd-1.c new file mode 100644 index 0000000..76bcec0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-vreducepd-1.c @@ -0,0 +1,29 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "vreducepd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreducepd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreducepd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreducepd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreducepd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreducepd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ + +#include <immintrin.h> + +#define IMM 123 + +volatile __m256d x1; +volatile __m128d x2; +volatile __mmask8 m; + +void extern +avx156p_test (void) +{ + x1 = _mm256_reduce_pd (x1, IMM); + x2 = _mm_reduce_pd (x2, IMM); + + x1 = _mm256_mask_reduce_pd (x1, m, x1, IMM); + x2 = _mm_mask_reduce_pd (x2, m, x2, IMM); + + x1 = _mm256_maskz_reduce_pd (m, x1, IMM); + x2 = _mm_maskz_reduce_pd (m, x2, IMM); +} diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-vreduceps-1.c b/gcc/testsuite/gcc.target/i386/avx10_1-vreduceps-1.c new file mode 100644 index 0000000..9d3aeb3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx10_1-vreduceps-1.c @@ -0,0 +1,29 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx10.1 -O2" } */ +/* { dg-final { scan-assembler-times "vreduceps\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreduceps\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreduceps\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreduceps\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreduceps\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vreduceps\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ + +#include <immintrin.h> + +#define IMM 123 + +volatile __m256 x1; +volatile __m128 x2; +volatile __mmask8 m; + +void extern +avx10_1_test (void) +{ + x1 = _mm256_reduce_ps (x1, IMM); + x2 = _mm_reduce_ps (x2, IMM); + + x1 = _mm256_mask_reduce_ps (x1, m, x1, IMM); + x2 = _mm_mask_reduce_ps (x2, m, x2, IMM); + + x1 = _mm256_maskz_reduce_ps (m, x1, IMM); + x2 = _mm_maskz_reduce_ps (m, x2, IMM); +} |