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| author | Chris Demetriou <cgd@broadcom.com> | 2002-08-02 01:16:09 +0000 |
|---|---|---|
| committer | Chris Demetriou <cgd@gcc.gnu.org> | 2002-08-01 18:16:09 -0700 |
| commit | 5b552f76617c3d63513a5590dd26f4e6c2fe8589 (patch) | |
| tree | 5c7ec0f226f3cc61edad5fdea7607c7c449e4b63 /gcc | |
| parent | 54fbf6a1b4adbb08ddc8ca53a5b5fea4c8dd6e56 (diff) | |
| download | gcc-5b552f76617c3d63513a5590dd26f4e6c2fe8589.zip gcc-5b552f76617c3d63513a5590dd26f4e6c2fe8589.tar.gz gcc-5b552f76617c3d63513a5590dd26f4e6c2fe8589.tar.bz2 | |
config.gcc (mipsisa64sb1-*-elf*): New configuration.
2002-08-01 Chris Demetriou <cgd@broadcom.com>
* config.gcc (mipsisa64sb1-*-elf*): New configuration.
(mipsisa64sb1el-*-elf*): Likewise.
* config/mips/mips.c (mips_cpu_info_table): Add sb1.
* config/mips/mips.h (processor_type): Add PROCESSOR_SB1.
(TARGET_SB1, TUNE_SB1): New macros.
* doc/invoke.texi: Add sb1 to documentation for MIPS -march and
-mtune flags.
From-SVN: r55965
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 10 | ||||
| -rw-r--r-- | gcc/config/mips/mips.c | 3 | ||||
| -rw-r--r-- | gcc/config/mips/mips.h | 5 | ||||
| -rw-r--r-- | gcc/doc/invoke.texi | 4 |
4 files changed, 19 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 480722d..2c9ce6b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,13 @@ +2002-08-01 Chris Demetriou <cgd@broadcom.com> + + * config.gcc (mipsisa64sb1-*-elf*): New configuration. + (mipsisa64sb1el-*-elf*): Likewise. + * config/mips/mips.c (mips_cpu_info_table): Add sb1. + * config/mips/mips.h (processor_type): Add PROCESSOR_SB1. + (TARGET_SB1, TUNE_SB1): New macros. + * doc/invoke.texi: Add sb1 to documentation for MIPS -march and + -mtune flags. + 2002-08-01 David Edelsohn <edelsohn@gnu.org> * varasm.c (asm_emit_uninitialized): Return false if global BSS diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index d04f4ce..f4b4e01 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -610,6 +610,9 @@ const struct mips_cpu_info mips_cpu_info_table[] = { { "5kc", PROCESSOR_R5KC, 64 }, { "20kc", PROCESSOR_R20KC, 64 }, + /* Broadcom SB-1 CPU core */ + { "sb1", PROCESSOR_SB1, 64 }, + /* End marker */ { 0, 0, 0 } }; diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 4759345..3fae4ec 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -70,7 +70,8 @@ enum processor_type { PROCESSOR_R8000, PROCESSOR_R4KC, PROCESSOR_R5KC, - PROCESSOR_R20KC + PROCESSOR_R20KC, + PROCESSOR_SB1 }; /* Recast the cpu class to be the cpu attribute. */ @@ -352,6 +353,7 @@ extern void sbss_section PARAMS ((void)); #define TARGET_MIPS4300 (mips_arch == PROCESSOR_R4300) #define TARGET_MIPS4KC (mips_arch == PROCESSOR_R4KC) #define TARGET_MIPS5KC (mips_arch == PROCESSOR_R5KC) +#define TARGET_SB1 (mips_arch == PROCESSOR_SB1) /* Scheduling target defines. */ #define TUNE_MIPS3000 (mips_tune == PROCESSOR_R3000) @@ -359,6 +361,7 @@ extern void sbss_section PARAMS ((void)); #define TUNE_MIPS4000 (mips_tune == PROCESSOR_R4000) #define TUNE_MIPS5000 (mips_tune == PROCESSOR_R5000) #define TUNE_MIPS6000 (mips_tune == PROCESSOR_R6000) +#define TUNE_SB1 (mips_tune == PROCESSOR_SB1) /* Define preprocessor macros for the -march and -mtune options. PREFIX is either _MIPS_ARCH or _MIPS_TUNE, INFO is the selected diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index fb91197..a29f5e3 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -7006,8 +7006,8 @@ are: @samp{mips1}, @samp{mips2}, @samp{mips3}, @samp{mips4}, @samp{mips32} and @samp{mips64}. The processor names are: @samp{r2000}, @samp{r3000}, @samp{r3900}, @samp{r4000}, @samp{vr4100}, @samp{vr4300}, @samp{r4400}, @samp{r4600}, @samp{r4650}, @samp{vr5000}, @samp{r6000}, -@samp{r8000}, @samp{4kc}, @samp{4kp}, @samp{5kc}, @samp{20kc} -and @samp{orion}. The special value @samp{from-abi} selects the +@samp{r8000}, @samp{4kc}, @samp{4kp}, @samp{5kc}, @samp{20kc}, +@samp{orion}, and @samp{sb1}. The special value @samp{from-abi} selects the most compatible architecture for the selected ABI (that is, @samp{mips1} for 32-bit ABIs and @samp{mips3} for 64-bit ABIs)@. |