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authorJeff Law <jlaw@ventanamicro.com>2025-01-20 14:35:59 -0700
committerJeff Law <jlaw@ventanamicro.com>2025-01-20 14:35:59 -0700
commit59e5d086a348f2b9e5adae1ba820ba7aaf7289db (patch)
treeb76fa891688efad682de9597a9c1c8701a3b0720 /gcc
parent5ad94b64089f05f55dbf9014096106ff395c7892 (diff)
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[PR target/116256] Fix latent regression in pattern to associate arithmetic to simplify constants
This is something I spotted working on an outstanding issue with pr116256. It's a latent regression. I'm reasonably sure that with some effort I could find a testcase that would represent a regression, probably just by adjusting the constant index in "f" within in gcc.c-torture/execute/index-1.c We have to define_insn_and_split patterns that potentially reassociate shifts and adds to make a constant term cheaper to synthesize. The split code for these two patterns assumes that if the left shifted constant is cheaper than the right shifted constant then the left shifted constant can be loaded with a trivial set. That is not always the case -- and we'll ICE. This patch simplifies the matching condition so that it only matches when the constant can be loaded with a single instruction. Tested in my tester on rv32 and rv64. Will wait for precommit CI to render a verdict. Jeff PR target/116256 gcc/ * config/riscv/riscv.md (reassocating constant addition): Adjust condition to avoid creating an unrecognizable insn.
Diffstat (limited to 'gcc')
-rw-r--r--gcc/config/riscv/riscv.md12
1 files changed, 2 insertions, 10 deletions
diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index c2a9de6..e4123c9 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -4680,11 +4680,7 @@
(match_operand 2 "const_int_operand" "n"))
(match_operand 3 "const_int_operand" "n")))
(clobber (match_scratch:DI 4 "=&r"))]
- "(TARGET_64BIT
- && riscv_const_insns (operands[3], false)
- && ((riscv_const_insns (operands[3], false)
- < riscv_const_insns (GEN_INT (INTVAL (operands[3]) >> INTVAL (operands[2])), false))
- || riscv_const_insns (GEN_INT (INTVAL (operands[3]) >> INTVAL (operands[2])), false) == 0))"
+ "(TARGET_64BIT && riscv_const_insns (operands[3], false) == 1)"
"#"
"&& reload_completed"
[(set (match_dup 0) (ashift:DI (match_dup 1) (match_dup 2)))
@@ -4700,11 +4696,7 @@
(match_operand 2 "const_int_operand" "n"))
(match_operand 3 "const_int_operand" "n"))))
(clobber (match_scratch:DI 4 "=&r"))]
- "(TARGET_64BIT
- && riscv_const_insns (operands[3], false)
- && ((riscv_const_insns (operands[3], false)
- < riscv_const_insns (GEN_INT (INTVAL (operands[3]) >> INTVAL (operands[2])), false))
- || riscv_const_insns (GEN_INT (INTVAL (operands[3]) >> INTVAL (operands[2])), false) == 0))"
+ "(TARGET_64BIT && riscv_const_insns (operands[3], false) == 1)"
"#"
"&& reload_completed"
[(set (match_dup 0) (ashift:DI (match_dup 1) (match_dup 2)))