re PR target/46779 ([avr] wrong code generation for values held in R28/R29)

	PR target/46779
	PR target/45291
	PR target/41894
	* gcc.target/avr/pr46779-1.c: New test case
	* gcc.target/avr/pr46779-2.c: New test case

From-SVN: r172442

3 files changed, 110 insertions, 0 deletions

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 3eca0d4..ec65985 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2011-04-14  Georg-Johann Lay  <avr@gjlay.de>
+
+	PR target/46779
+	PR target/45291
+	PR target/41894
+	* gcc.target/avr/pr46779-1.c: New test case
+	* gcc.target/avr/pr46779-2.c: New test case
+
 2011-04-14  Jason Merrill  <jason@redhat.com>
 
 	* g++.dg/cpp0x/sfinae15.C: New.
diff --git a/gcc/testsuite/gcc.target/avr/pr46779-1.c b/gcc/testsuite/gcc.target/avr/pr46779-1.c
new file mode 100644
index 0000000..24522f1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/avr/pr46779-1.c
@@ -0,0 +1,51 @@
+/* { dg-do run } */
+/* { dg-options "-Os -fsplit-wide-types" } */
+
+/* This testcase should uncover bugs like
+   PR46779
+   PR45291
+   PR41894
+
+   The inline asm just serves to direct y into the Y register.
+   Otherwise, it is hard to write a "stable" test case that
+   also fails with slight variations in source code, middle- resp.
+   backend.
+
+   The problem is that Y is also the frame-pointer, and
+   avr.c:avr_hard_regno_mode_ok disallows QI to get in Y-reg.
+   However, the y.a = 0 generates a
+       (set (subreg:QI (reg:HI pseudo)) ...)
+   where pseudo gets allocated to Y.
+
+   Reload fails to generate the right spill.
+*/
+
+#include <stdlib.h>
+
+struct S
+{
+    unsigned char a, b;
+} ab = {12, 34};
+
+void yoo (struct S y)
+{
+    __asm volatile ("ldi %B0, 56" : "+y" (y));
+    y.a = 0;
+    __asm volatile ("; y = %0" : "+y" (y));
+    ab = y;
+}
+
+int main ()
+{
+    yoo (ab);
+
+    if (ab.a != 0)
+        abort();
+
+    if (ab.b != 56)
+        abort();
+
+    exit (0);
+    
+    return 0;
+}
diff --git a/gcc/testsuite/gcc.target/avr/pr46779-2.c b/gcc/testsuite/gcc.target/avr/pr46779-2.c
new file mode 100644
index 0000000..682070b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/avr/pr46779-2.c
@@ -0,0 +1,51 @@
+/* { dg-do run } */
+/* { dg-options "-Os -fno-split-wide-types" } */
+
+/* This testcase should uncover bugs like
+   PR46779
+   PR45291
+   PR41894
+
+   The inline asm just serves to direct y into the Y register.
+   Otherwise, it is hard to write a "stable" test case that
+   also fails with slight variations in source code, middle- resp.
+   backend.
+
+   The problem is that Y is also the frame-pointer, and
+   avr.c:avr_hard_regno_mode_ok disallows QI to get in Y-reg.
+   However, the y.a = 0 generates a
+       (set (subreg:QI (reg:HI pseudo)) ...)
+   where pseudo gets allocated to Y.
+
+   Reload fails to generate the right spill.
+*/
+
+#include <stdlib.h>
+
+struct S
+{
+    unsigned char a, b;
+} ab = {12, 34};
+
+void yoo (struct S y)
+{
+    __asm volatile ("ldi %B0, 56" : "+y" (y));
+    y.a = 0;
+    __asm volatile ("; y = %0" : "+y" (y));
+    ab = y;
+}
+
+int main ()
+{
+    yoo (ab);
+
+    if (ab.a != 0)
+        abort();
+
+    if (ab.b != 56)
+        abort();
+
+    exit (0);
+    
+    return 0;
+}