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| author | Jakub Jelinek <jakub@redhat.com> | 2011-10-13 00:07:24 +0200 |
|---|---|---|
| committer | Jakub Jelinek <jakub@gcc.gnu.org> | 2011-10-13 00:07:24 +0200 |
| commit | 4eb20b036e26aedb39beae5de3ec4efeb7a097e8 (patch) | |
| tree | 3520a4af9b3fe47476a6ef24b30afd6b7c114f8b /gcc | |
| parent | f228967232d972181d9c497ca7731d5d1db60881 (diff) | |
| download | gcc-4eb20b036e26aedb39beae5de3ec4efeb7a097e8.zip gcc-4eb20b036e26aedb39beae5de3ec4efeb7a097e8.tar.gz gcc-4eb20b036e26aedb39beae5de3ec4efeb7a097e8.tar.bz2 | |
sse.md (vec_unpacks_lo_<mode>, [...]): Change VI124_128 mode to VI124_AVX2.
* config/i386/sse.md (vec_unpacks_lo_<mode>,
vec_unpacks_hi_<mode>, vec_unpacku_lo_<mode>,
vec_unpacku_hi_<mode>): Change VI124_128 mode to
VI124_AVX2.
* config/i386/i386.c (ix86_expand_sse_unpack): Handle
V32QImode, V16HImode and V8SImode for TARGET_AVX2.
From-SVN: r179872
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/i386/i386.c | 36 | ||||
| -rw-r--r-- | gcc/config/i386/sse.md | 8 |
3 files changed, 46 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 753677a..cdc9391 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,12 @@ 2011-10-12 Jakub Jelinek <jakub@redhat.com> + * config/i386/sse.md (vec_unpacks_lo_<mode>, + vec_unpacks_hi_<mode>, vec_unpacku_lo_<mode>, + vec_unpacku_hi_<mode>): Change VI124_128 mode to + VI124_AVX2. + * config/i386/i386.c (ix86_expand_sse_unpack): Handle + V32QImode, V16HImode and V8SImode for TARGET_AVX2. + * config/i386/sse.md (vec_avx2): New mode_attr. (mulv16qi3): Macroize to cover also mulv32qi3 for TARGET_AVX2 into ... diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 26a4924..3a53829 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -19683,9 +19683,38 @@ ix86_expand_sse_unpack (rtx operands[2], bool unsigned_p, bool high_p) if (TARGET_SSE4_1) { rtx (*unpack)(rtx, rtx); + rtx (*extract)(rtx, rtx) = NULL; + enum machine_mode halfmode = BLKmode; switch (imode) { + case V32QImode: + if (unsigned_p) + unpack = gen_avx2_zero_extendv16qiv16hi2; + else + unpack = gen_avx2_sign_extendv16qiv16hi2; + halfmode = V16QImode; + extract + = high_p ? gen_vec_extract_hi_v32qi : gen_vec_extract_lo_v32qi; + break; + case V16HImode: + if (unsigned_p) + unpack = gen_avx2_zero_extendv8hiv8si2; + else + unpack = gen_avx2_sign_extendv8hiv8si2; + halfmode = V8HImode; + extract + = high_p ? gen_vec_extract_hi_v16hi : gen_vec_extract_lo_v16hi; + break; + case V8SImode: + if (unsigned_p) + unpack = gen_avx2_zero_extendv4siv4di2; + else + unpack = gen_avx2_sign_extendv4siv4di2; + halfmode = V4SImode; + extract + = high_p ? gen_vec_extract_hi_v8si : gen_vec_extract_lo_v8si; + break; case V16QImode: if (unsigned_p) unpack = gen_sse4_1_zero_extendv8qiv8hi2; @@ -19708,7 +19737,12 @@ ix86_expand_sse_unpack (rtx operands[2], bool unsigned_p, bool high_p) gcc_unreachable (); } - if (high_p) + if (GET_MODE_SIZE (imode) == 32) + { + tmp = gen_reg_rtx (halfmode); + emit_insn (extract (tmp, operands[1])); + } + else if (high_p) { /* Shift higher 8 bytes to lower 8 bytes. */ tmp = gen_reg_rtx (imode); diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index e649b30..3073ab2 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -7536,25 +7536,25 @@ (define_expand "vec_unpacks_lo_<mode>" [(match_operand:<sseunpackmode> 0 "register_operand" "") - (match_operand:VI124_128 1 "register_operand" "")] + (match_operand:VI124_AVX2 1 "register_operand" "")] "TARGET_SSE2" "ix86_expand_sse_unpack (operands, false, false); DONE;") (define_expand "vec_unpacks_hi_<mode>" [(match_operand:<sseunpackmode> 0 "register_operand" "") - (match_operand:VI124_128 1 "register_operand" "")] + (match_operand:VI124_AVX2 1 "register_operand" "")] "TARGET_SSE2" "ix86_expand_sse_unpack (operands, false, true); DONE;") (define_expand "vec_unpacku_lo_<mode>" [(match_operand:<sseunpackmode> 0 "register_operand" "") - (match_operand:VI124_128 1 "register_operand" "")] + (match_operand:VI124_AVX2 1 "register_operand" "")] "TARGET_SSE2" "ix86_expand_sse_unpack (operands, true, false); DONE;") (define_expand "vec_unpacku_hi_<mode>" [(match_operand:<sseunpackmode> 0 "register_operand" "") - (match_operand:VI124_128 1 "register_operand" "")] + (match_operand:VI124_AVX2 1 "register_operand" "")] "TARGET_SSE2" "ix86_expand_sse_unpack (operands, true, true); DONE;") |