c-pch.c (get_ident): Avoid C++ keywords.

	* c-pch.c (get_ident): Avoid C++ keywords.
	* combine-stack-adj.c (single_set_for_csa): Likewise.
	* final.c (asm_insn_count, final_scan_insn, alter_subreg,
	output_asm_insn): Likewise.
	* reload.c (push_secondary_reload, find_reusable_reload,
	push_reload, combine_reloads, find_reloads,
	debug_reload_to_stream): Likewise.
	* reload.h (struct reload): Likewise.
	* reload1.c (reload_reg_class_lower, find_reg, find_reload_regs,
	allocate_reload_reg, choose_reload_regs, emit_input_reload_insns,
	emit_output_reload_insns): Likewise.
	* targhooks.c (default_secondary_reload): Likewise.
	* varasm.c (section_entry_eq, object_block_entry_eq): Likewise.

From-SVN: r137895

9 files changed, 108 insertions, 92 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 43e62ff..fc14b40 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,21 @@
 2008-07-16  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 
+	* c-pch.c (get_ident): Avoid C++ keywords.
+	* combine-stack-adj.c (single_set_for_csa): Likewise.
+	* final.c (asm_insn_count, final_scan_insn, alter_subreg,
+	output_asm_insn): Likewise.
+	* reload.c (push_secondary_reload, find_reusable_reload,
+	push_reload, combine_reloads, find_reloads,
+	debug_reload_to_stream): Likewise.
+	* reload.h (struct reload): Likewise.
+	* reload1.c (reload_reg_class_lower, find_reg, find_reload_regs,
+	allocate_reload_reg, choose_reload_regs, emit_input_reload_insns,
+	emit_output_reload_insns): Likewise.
+	* targhooks.c (default_secondary_reload): Likewise.
+	* varasm.c (section_entry_eq, object_block_entry_eq): Likewise.
+
+2008-07-16  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
+
 	* recog.c (validate_change_1, validate_change,
 	validate_unshare_change, validate_replace_rtx_1, struct
 	funny_match, constrain_operands, peephole2_optimize): Avoid C++
diff --git a/gcc/c-pch.c b/gcc/c-pch.c
index 0da17f7..8273914 100644
--- a/gcc/c-pch.c
+++ b/gcc/c-pch.c
@@ -93,10 +93,10 @@ static const char *
 get_ident (void)
 {
   static char result[IDENT_LENGTH];
-  static const char template[IDENT_LENGTH] = "gpch.013";
+  static const char templ[IDENT_LENGTH] = "gpch.013";
   static const char c_language_chars[] = "Co+O";
 
-  memcpy (result, template, IDENT_LENGTH);
+  memcpy (result, templ, IDENT_LENGTH);
   result[4] = c_language_chars[c_language];
 
   return result;
diff --git a/gcc/combine-stack-adj.c b/gcc/combine-stack-adj.c
index afcb35b..c678a60 100644
--- a/gcc/combine-stack-adj.c
+++ b/gcc/combine-stack-adj.c
@@ -143,14 +143,14 @@ single_set_for_csa (rtx insn)
 
   for (i = 1; i < XVECLEN (tmp, 0); ++i)
     {
-      rtx this = XVECEXP (tmp, 0, i);
+      rtx this_rtx = XVECEXP (tmp, 0, i);
 
       /* The special case is allowing a no-op set.  */
-      if (GET_CODE (this) == SET
-	  && SET_SRC (this) == SET_DEST (this))
+      if (GET_CODE (this_rtx) == SET
+	  && SET_SRC (this_rtx) == SET_DEST (this_rtx))
 	;
-      else if (GET_CODE (this) != CLOBBER
-	       && GET_CODE (this) != USE)
+      else if (GET_CODE (this_rtx) != CLOBBER
+	       && GET_CODE (this_rtx) != USE)
 	return NULL_RTX;
     }
 
diff --git a/gcc/final.c b/gcc/final.c
index 7a87235..f27e430 100644
--- a/gcc/final.c
+++ b/gcc/final.c
@@ -1377,20 +1377,20 @@ shorten_branches (rtx first ATTRIBUTE_UNUSED)
 static int
 asm_insn_count (rtx body)
 {
-  const char *template;
+  const char *templ;
   int count = 1;
 
   if (GET_CODE (body) == ASM_INPUT)
-    template = XSTR (body, 0);
+    templ = XSTR (body, 0);
   else
-    template = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL);
+    templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL);
 
-  if (!*template)
+  if (!*templ)
     return 0;
 
-  for (; *template; template++)
-    if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template, template)
-	|| *template == '\n')
+  for (; *templ; templ++)
+    if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ)
+	|| *templ == '\n')
       count++;
 
   return count;
@@ -2039,7 +2039,7 @@ final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED,
       {
 	rtx body = PATTERN (insn);
 	int insn_code_number;
-	const char *template;
+	const char *templ;
 
 #ifdef HAVE_conditional_execution
 	/* Reset this early so it is correct for ASM statements.  */
@@ -2556,12 +2556,12 @@ final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED,
 #endif
 
 	/* Find the proper template for this insn.  */
-	template = get_insn_template (insn_code_number, insn);
+	templ = get_insn_template (insn_code_number, insn);
 
 	/* If the C code returns 0, it means that it is a jump insn
 	   which follows a deleted test insn, and that test insn
 	   needs to be reinserted.  */
-	if (template == 0)
+	if (templ == 0)
 	  {
 	    rtx prev;
 
@@ -2584,12 +2584,12 @@ final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED,
 
 	/* If the template is the string "#", it means that this insn must
 	   be split.  */
-	if (template[0] == '#' && template[1] == '\0')
+	if (templ[0] == '#' && templ[1] == '\0')
 	  {
-	    rtx new = try_split (body, insn, 0);
+	    rtx new_rtx = try_split (body, insn, 0);
 
 	    /* If we didn't split the insn, go away.  */
-	    if (new == insn && PATTERN (new) == body)
+	    if (new_rtx == insn && PATTERN (new_rtx) == body)
 	      fatal_insn ("could not split insn", insn);
 
 #ifdef HAVE_ATTR_length
@@ -2599,7 +2599,7 @@ final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED,
 	    gcc_unreachable ();
 #endif
 
-	    return new;
+	    return new_rtx;
 	  }
 
 #ifdef TARGET_UNWIND_INFO
@@ -2610,7 +2610,7 @@ final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED,
 #endif
 
 	/* Output assembler code from the template.  */
-	output_asm_insn (template, recog_data.operand);
+	output_asm_insn (templ, recog_data.operand);
 
 	/* If necessary, report the effect that the instruction has on
 	   the unwind info.   We've already done this for delay slots
@@ -2739,11 +2739,11 @@ alter_subreg (rtx *xp)
     }
   else
     {
-      rtx new = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
+      rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
 				 SUBREG_BYTE (x));
 
-      if (new != 0)
-	*xp = new;
+      if (new_rtx != 0)
+	*xp = new_rtx;
       else if (REG_P (y))
 	{
 	  /* Simplify_subreg can't handle some REG cases, but we have to.  */
@@ -3097,7 +3097,7 @@ output_asm_operand_names (rtx *operands, int *oporder, int nops)
       of the operand, with no other punctuation.  */
 
 void
-output_asm_insn (const char *template, rtx *operands)
+output_asm_insn (const char *templ, rtx *operands)
 {
   const char *p;
   int c;
@@ -3110,11 +3110,11 @@ output_asm_insn (const char *template, rtx *operands)
 
   /* An insn may return a null string template
      in a case where no assembler code is needed.  */
-  if (*template == 0)
+  if (*templ == 0)
     return;
 
   memset (opoutput, 0, sizeof opoutput);
-  p = template;
+  p = templ;
   putc ('\t', asm_out_file);
 
 #ifdef ASM_OUTPUT_OPCODE
diff --git a/gcc/reload.c b/gcc/reload.c
index 7c7d736..a391c45 100644
--- a/gcc/reload.c
+++ b/gcc/reload.c
@@ -428,8 +428,8 @@ push_secondary_reload (int in_p, rtx x, int opnum, int optional,
   /* See if we can reuse an existing secondary reload.  */
   for (s_reload = 0; s_reload < n_reloads; s_reload++)
     if (rld[s_reload].secondary_p
-	&& (reg_class_subset_p (rclass, rld[s_reload].class)
-	    || reg_class_subset_p (rld[s_reload].class, rclass))
+	&& (reg_class_subset_p (rclass, rld[s_reload].rclass)
+	    || reg_class_subset_p (rld[s_reload].rclass, rclass))
 	&& ((in_p && rld[s_reload].inmode == mode)
 	    || (! in_p && rld[s_reload].outmode == mode))
 	&& ((in_p && rld[s_reload].secondary_in_reload == t_reload)
@@ -445,8 +445,8 @@ push_secondary_reload (int in_p, rtx x, int opnum, int optional,
 	if (! in_p)
 	  rld[s_reload].outmode = mode;
 
-	if (reg_class_subset_p (rclass, rld[s_reload].class))
-	  rld[s_reload].class = rclass;
+	if (reg_class_subset_p (rclass, rld[s_reload].rclass))
+	  rld[s_reload].rclass = rclass;
 
 	rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
 	rld[s_reload].optional &= optional;
@@ -479,7 +479,7 @@ push_secondary_reload (int in_p, rtx x, int opnum, int optional,
 
       /* We need to make a new secondary reload for this register class.  */
       rld[s_reload].in = rld[s_reload].out = 0;
-      rld[s_reload].class = rclass;
+      rld[s_reload].rclass = rclass;
 
       rld[s_reload].inmode = in_p ? mode : VOIDmode;
       rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
@@ -732,8 +732,8 @@ find_reusable_reload (rtx *p_in, rtx out, enum reg_class rclass,
      than we otherwise would.  */
 
   for (i = 0; i < n_reloads; i++)
-    if ((reg_class_subset_p (rclass, rld[i].class)
-	 || reg_class_subset_p (rld[i].class, rclass))
+    if ((reg_class_subset_p (rclass, rld[i].rclass)
+	 || reg_class_subset_p (rld[i].rclass, rclass))
 	/* If the existing reload has a register, it must fit our class.  */
 	&& (rld[i].reg_rtx == 0
 	    || TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
@@ -753,8 +753,8 @@ find_reusable_reload (rtx *p_in, rtx out, enum reg_class rclass,
      the preincrementation as happening before any ref in this insn
      to that register.  */
   for (i = 0; i < n_reloads; i++)
-    if ((reg_class_subset_p (rclass, rld[i].class)
-	 || reg_class_subset_p (rld[i].class, rclass))
+    if ((reg_class_subset_p (rclass, rld[i].rclass)
+	 || reg_class_subset_p (rld[i].rclass, rclass))
 	/* If the existing reload has a register, it must fit our
 	   class.  */
 	&& (rld[i].reg_rtx == 0
@@ -1327,7 +1327,7 @@ push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc,
       i = n_reloads;
       rld[i].in = in;
       rld[i].out = out;
-      rld[i].class = rclass;
+      rld[i].rclass = rclass;
       rld[i].inmode = inmode;
       rld[i].outmode = outmode;
       rld[i].reg_rtx = 0;
@@ -1411,8 +1411,8 @@ push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc,
 	  rld[i].out = out;
 	  rld[i].out_reg = outloc ? *outloc : 0;
 	}
-      if (reg_class_subset_p (rclass, rld[i].class))
-	rld[i].class = rclass;
+      if (reg_class_subset_p (rclass, rld[i].rclass))
+	rld[i].rclass = rclass;
       rld[i].optional &= optional;
       if (MERGE_TO_OTHER (type, rld[i].when_needed,
 			  opnum, rld[i].opnum))
@@ -1484,7 +1484,7 @@ push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc,
     {
       rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
 					  inmode, outmode,
-					  rld[i].class, i,
+					  rld[i].rclass, i,
 					  earlyclobber_operand_p (out));
 
       /* If the outgoing register already contains the same value
@@ -1730,8 +1730,8 @@ combine_reloads (void)
 	&& rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
 	&& rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
 	&& rld[i].when_needed != RELOAD_OTHER
-	&& (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode)
-	    == CLASS_MAX_NREGS (rld[output_reload].class,
+	&& (CLASS_MAX_NREGS (rld[i].rclass, rld[i].inmode)
+	    == CLASS_MAX_NREGS (rld[output_reload].rclass,
 				rld[output_reload].outmode))
 	&& rld[i].inc == 0
 	&& rld[i].reg_rtx == 0
@@ -1744,11 +1744,11 @@ combine_reloads (void)
 			    secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
 #endif
 	&& (SMALL_REGISTER_CLASSES
-	    ? (rld[i].class == rld[output_reload].class)
-	    : (reg_class_subset_p (rld[i].class,
-				   rld[output_reload].class)
-	       || reg_class_subset_p (rld[output_reload].class,
-				      rld[i].class)))
+	    ? (rld[i].rclass == rld[output_reload].rclass)
+	    : (reg_class_subset_p (rld[i].rclass,
+				   rld[output_reload].rclass)
+	       || reg_class_subset_p (rld[output_reload].rclass,
+				      rld[i].rclass)))
 	&& (MATCHES (rld[i].in, rld[output_reload].out)
 	    /* Args reversed because the first arg seems to be
 	       the one that we imagine being modified
@@ -1766,7 +1766,7 @@ combine_reloads (void)
 							     rld[output_reload].out))))
 	&& ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode,
 					 rld[i].when_needed != RELOAD_FOR_INPUT)
-	&& (reg_class_size[(int) rld[i].class]
+	&& (reg_class_size[(int) rld[i].rclass]
 	    || SMALL_REGISTER_CLASSES)
 	/* We will allow making things slightly worse by combining an
 	   input and an output, but no worse than that.  */
@@ -1799,9 +1799,9 @@ combine_reloads (void)
 	    = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
 #endif
 	/* If required, minimize the register class.  */
-	if (reg_class_subset_p (rld[output_reload].class,
-				rld[i].class))
-	  rld[i].class = rld[output_reload].class;
+	if (reg_class_subset_p (rld[output_reload].rclass,
+				rld[i].rclass))
+	  rld[i].rclass = rld[output_reload].rclass;
 
 	/* Transfer all replacements from the old reload to the combined.  */
 	for (j = 0; j < n_replacements; j++)
@@ -1835,7 +1835,7 @@ combine_reloads (void)
 						rld[output_reload].out)
 	&& (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
 	&& HARD_REGNO_MODE_OK (regno, rld[output_reload].outmode)
-	&& TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class],
+	&& TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].rclass],
 			      regno)
 	&& (hard_regno_nregs[regno][rld[output_reload].outmode]
 	    <= hard_regno_nregs[regno][GET_MODE (XEXP (note, 0))])
@@ -1843,10 +1843,10 @@ combine_reloads (void)
 	   won't want this register.  */
 	&& ((secondary_out = rld[output_reload].secondary_out_reload) == -1
 	    || (!(TEST_HARD_REG_BIT
-		  (reg_class_contents[(int) rld[secondary_out].class], regno))
+		  (reg_class_contents[(int) rld[secondary_out].rclass], regno))
 		&& ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
 		    || !(TEST_HARD_REG_BIT
-			 (reg_class_contents[(int) rld[secondary_out].class],
+			 (reg_class_contents[(int) rld[secondary_out].rclass],
 			  regno)))))
 	&& !fixed_regs[regno]
 	/* Check that a former pseudo is valid; see find_dummy_reload.  */
@@ -4184,7 +4184,7 @@ find_reloads (rtx insn, int replace, int ind_levels, int live_known,
 	&& rld[i].out == 0)
       {
 	rld[i].reg_rtx
-	  = find_equiv_reg (rld[i].in, insn, rld[i].class, -1,
+	  = find_equiv_reg (rld[i].in, insn, rld[i].rclass, -1,
 			    static_reload_reg_p, 0, rld[i].inmode);
 	/* Prevent generation of insn to load the value
 	   because the one we found already has the value.  */
@@ -4453,7 +4453,7 @@ find_reloads (rtx insn, int replace, int ind_levels, int live_known,
 	if (i != j && rld[j].in != 0 && rld[j].out == 0
 	    && rld[j].when_needed == rld[i].when_needed
 	    && MATCHES (rld[i].in, rld[j].in)
-	    && rld[i].class == rld[j].class
+	    && rld[i].rclass == rld[j].rclass
 	    && !rld[i].nocombine && !rld[j].nocombine
 	    && rld[i].reg_rtx == rld[j].reg_rtx)
 	  {
@@ -4482,7 +4482,7 @@ find_reloads (rtx insn, int replace, int ind_levels, int live_known,
 	       > GET_MODE_SIZE (rld[i].inmode)))
 	  ? rld[i].outmode : rld[i].inmode;
 
-      rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode);
+      rld[i].nregs = CLASS_MAX_NREGS (rld[i].rclass, rld[i].mode);
     }
 
   /* Special case a simple move with an input reload and a
@@ -4499,14 +4499,14 @@ find_reloads (rtx insn, int replace, int ind_levels, int live_known,
 	unsigned int regno = REGNO (dest);
 
 	if (regno < FIRST_PSEUDO_REGISTER
-	    && TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno)
+	    && TEST_HARD_REG_BIT (reg_class_contents[rld[i].rclass], regno)
 	    && HARD_REGNO_MODE_OK (regno, rld[i].mode))
 	  {
 	    int nr = hard_regno_nregs[regno][rld[i].mode];
 	    int ok = 1, nri;
 
 	    for (nri = 1; nri < nr; nri ++)
-	      if (! TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno + nri))
+	      if (! TEST_HARD_REG_BIT (reg_class_contents[rld[i].rclass], regno + nri))
 		ok = 0;
 
 	    if (ok)
@@ -7262,7 +7262,7 @@ debug_reload_to_stream (FILE *f)
 	  fprintf (f, "\n\t");
 	}
 
-      fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]);
+      fprintf (f, "%s, ", reg_class_names[(int) rld[r].rclass]);
 
       fprintf (f, "%s (opnum = %d)",
 	       reload_when_needed_name[(int) rld[r].when_needed],
diff --git a/gcc/reload.h b/gcc/reload.h
index bfa7e6a..3873f5c 100644
--- a/gcc/reload.h
+++ b/gcc/reload.h
@@ -83,7 +83,7 @@ struct reload
   rtx out;
 
   /* The class of registers to reload into.  */
-  enum reg_class class;
+  enum reg_class rclass;
 
   /* The mode this operand should have when reloaded, on input.  */
   enum machine_mode inmode;
diff --git a/gcc/reload1.c b/gcc/reload1.c
index ad58228..f28b01c 100644
--- a/gcc/reload1.c
+++ b/gcc/reload1.c
@@ -1637,8 +1637,8 @@ reload_reg_class_lower (const void *r1p, const void *r2p)
     return t;
 
   /* Count all solitary classes before non-solitary ones.  */
-  t = ((reg_class_size[(int) rld[r2].class] == 1)
-       - (reg_class_size[(int) rld[r1].class] == 1));
+  t = ((reg_class_size[(int) rld[r2].rclass] == 1)
+       - (reg_class_size[(int) rld[r1].rclass] == 1));
   if (t != 0)
     return t;
 
@@ -1648,7 +1648,7 @@ reload_reg_class_lower (const void *r1p, const void *r2p)
     return t;
 
   /* Consider reloads in order of increasing reg-class number.  */
-  t = (int) rld[r1].class - (int) rld[r2].class;
+  t = (int) rld[r1].rclass - (int) rld[r2].rclass;
   if (t != 0)
     return t;
 
@@ -1777,7 +1777,7 @@ find_reg (struct insn_chain *chain, int order)
 
   COPY_HARD_REG_SET (not_usable, bad_spill_regs);
   IOR_HARD_REG_SET (not_usable, bad_spill_regs_global);
-  IOR_COMPL_HARD_REG_SET (not_usable, reg_class_contents[rl->class]);
+  IOR_COMPL_HARD_REG_SET (not_usable, reg_class_contents[rl->rclass]);
 
   CLEAR_HARD_REG_SET (used_by_other_reload);
   for (k = 0; k < order; k++)
@@ -1918,7 +1918,7 @@ find_reload_regs (struct insn_chain *chain)
 	  {
 	    if (dump_file)
 	      fprintf (dump_file, "reload failure for reload %d\n", r);
-	    spill_failure (chain->insn, rld[r].class);
+	    spill_failure (chain->insn, rld[r].rclass);
 	    failure = 1;
 	    return;
 	  }
@@ -5474,7 +5474,7 @@ allocate_reload_reg (struct insn_chain *chain ATTRIBUTE_UNUSED, int r,
 
       for (count = 0; count < n_spills; count++)
 	{
-	  int rclass = (int) rld[r].class;
+	  int rclass = (int) rld[r].rclass;
 	  int regnum;
 
 	  i++;
@@ -5647,7 +5647,7 @@ choose_reload_regs (struct insn_chain *chain)
 	{
 	  max_group_size = MAX (rld[j].nregs, max_group_size);
 	  group_class
-	    = reg_class_superunion[(int) rld[j].class][(int) group_class];
+	    = reg_class_superunion[(int) rld[j].rclass][(int) group_class];
 	}
 
       save_reload_reg_rtx[j] = rld[j].reg_rtx;
@@ -5793,7 +5793,7 @@ choose_reload_regs (struct insn_chain *chain)
 #endif
 		  )
 		{
-		  enum reg_class rclass = rld[r].class, last_class;
+		  enum reg_class rclass = rld[r].rclass, last_class;
 		  rtx last_reg = reg_last_reload_reg[regno];
 		  enum machine_mode need_mode;
 
@@ -5857,7 +5857,7 @@ choose_reload_regs (struct insn_chain *chain)
 
 			  bad_for_class = 0;
 			  for (k = 0; k < nr; k++)
-			    bad_for_class |= ! TEST_HARD_REG_BIT (reg_class_contents[(int) rld[r].class],
+			    bad_for_class |= ! TEST_HARD_REG_BIT (reg_class_contents[(int) rld[r].rclass],
 								  i+k);
 
 			  /* We found a register that contains the
@@ -5939,7 +5939,7 @@ choose_reload_regs (struct insn_chain *chain)
 		  || REG_P (rld[r].in)
 		  || MEM_P (rld[r].in))
 	      && (rld[r].nregs == max_group_size
-		  || ! reg_classes_intersect_p (rld[r].class, group_class)))
+		  || ! reg_classes_intersect_p (rld[r].rclass, group_class)))
 	    search_equiv = rld[r].in;
 	  /* If this is an output reload from a simple move insn, look
 	     if an equivalence for the input is available.  */
@@ -5956,7 +5956,7 @@ choose_reload_regs (struct insn_chain *chain)
 	  if (search_equiv)
 	    {
 	      rtx equiv
-		= find_equiv_reg (search_equiv, insn, rld[r].class,
+		= find_equiv_reg (search_equiv, insn, rld[r].rclass,
 				  -1, NULL, 0, rld[r].mode);
 	      int regno = 0;
 
@@ -5997,7 +5997,7 @@ choose_reload_regs (struct insn_chain *chain)
 		    {
 		      regs_used |= TEST_HARD_REG_BIT (reload_reg_used_at_all,
 						      i);
-		      bad_for_class |= ! TEST_HARD_REG_BIT (reg_class_contents[(int) rld[r].class],
+		      bad_for_class |= ! TEST_HARD_REG_BIT (reg_class_contents[(int) rld[r].rclass],
 							   i);
 		    }
 
@@ -6135,9 +6135,9 @@ choose_reload_regs (struct insn_chain *chain)
 		  || rld[s].optional)
 		continue;
 
-	      if ((rld[s].class != rld[r].class
-		   && reg_classes_intersect_p (rld[r].class,
-					       rld[s].class))
+	      if ((rld[s].rclass != rld[r].rclass
+		   && reg_classes_intersect_p (rld[r].rclass,
+					       rld[s].rclass))
 		  || rld[s].nregs < rld[r].nregs)
 		break;
 	    }
@@ -6818,7 +6818,7 @@ emit_input_reload_insns (struct insn_chain *chain, struct reload *rl,
 
 	  sri.icode = CODE_FOR_nothing;
 	  sri.prev_sri = NULL;
-	  new_class = targetm.secondary_reload (1, real_oldequiv, rl->class,
+	  new_class = targetm.secondary_reload (1, real_oldequiv, rl->rclass,
 						mode, &sri);
 
 	  if (new_class == NO_REGS && sri.icode == CODE_FOR_nothing)
@@ -7008,7 +7008,7 @@ emit_output_reload_insns (struct insn_chain *chain, struct reload *rl,
 	  && reg_equiv_mem[REGNO (old)] != 0)
 	real_old = reg_equiv_mem[REGNO (old)];
 
-      if (secondary_reload_class (0, rl->class, mode, real_old) != NO_REGS)
+      if (secondary_reload_class (0, rl->rclass, mode, real_old) != NO_REGS)
 	{
 	  rtx second_reloadreg = reloadreg;
 	  reloadreg = rld[secondary_reload].reg_rtx;
diff --git a/gcc/targhooks.c b/gcc/targhooks.c
index 1cb5614..4064ad47 100644
--- a/gcc/targhooks.c
+++ b/gcc/targhooks.c
@@ -581,7 +581,7 @@ default_secondary_reload (bool in_p ATTRIBUTE_UNUSED, rtx x ATTRIBUTE_UNUSED,
 			  enum machine_mode reload_mode ATTRIBUTE_UNUSED,
 			  secondary_reload_info *sri)
 {
-  enum reg_class class = NO_REGS;
+  enum reg_class rclass = NO_REGS;
 
   if (sri->prev_sri && sri->prev_sri->t_icode != CODE_FOR_nothing)
     {
@@ -590,13 +590,13 @@ default_secondary_reload (bool in_p ATTRIBUTE_UNUSED, rtx x ATTRIBUTE_UNUSED,
     }
 #ifdef SECONDARY_INPUT_RELOAD_CLASS
   if (in_p)
-    class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
+    rclass = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
 #endif
 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
   if (! in_p)
-    class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
+    rclass = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
 #endif
-  if (class != NO_REGS)
+  if (rclass != NO_REGS)
     {
       enum insn_code icode = (in_p ? reload_in_optab[(int) reload_mode]
 			      : reload_out_optab[(int) reload_mode]);
@@ -648,19 +648,19 @@ default_secondary_reload (bool in_p ATTRIBUTE_UNUSED, rtx x ATTRIBUTE_UNUSED,
 
 	  if (reg_class_subset_p (reload_class, insn_class))
 	    {
-	      gcc_assert (scratch_class == class);
-	      class = NO_REGS;
+	      gcc_assert (scratch_class == rclass);
+	      rclass = NO_REGS;
 	    }
 	  else
-	    class = insn_class;
+	    rclass = insn_class;
 
         }
-      if (class == NO_REGS)
+      if (rclass == NO_REGS)
 	sri->icode = icode;
       else
 	sri->t_icode = icode;
     }
-  return class;
+  return rclass;
 }
 
 bool
diff --git a/gcc/varasm.c b/gcc/varasm.c
index 49cdda4..ad24212 100644
--- a/gcc/varasm.c
+++ b/gcc/varasm.c
@@ -470,9 +470,9 @@ static int
 section_entry_eq (const void *p1, const void *p2)
 {
   const section *old = (const section *) p1;
-  const char *new = (const char *) p2;
+  const char *new_name = (const char *) p2;
 
-  return strcmp (old->named.name, new) == 0;
+  return strcmp (old->named.name, new_name) == 0;
 }
 
 static hashval_t
@@ -498,9 +498,9 @@ static int
 object_block_entry_eq (const void *p1, const void *p2)
 {
   const struct object_block *old = (const struct object_block *) p1;
-  const section *new = (const section *) p2;
+  const section *new_section = (const section *) p2;
 
-  return old->sect == new;
+  return old->sect == new_section;
 }
 
 static hashval_t