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| author | Andreas Krebbel <krebbel@linux.vnet.ibm.com> | 2015-09-10 14:02:34 +0000 |
|---|---|---|
| committer | Andreas Krebbel <krebbel@gcc.gnu.org> | 2015-09-10 14:02:34 +0000 |
| commit | 47b653bd9f7fa1a34bddeec249d8ca65e5a00c15 (patch) | |
| tree | 345cbbf89e6a93cde24077b7708dfcc798b5b6ee /gcc | |
| parent | e0654cf2a9016ee964adcaedff5b9b64dc076646 (diff) | |
| download | gcc-47b653bd9f7fa1a34bddeec249d8ca65e5a00c15.zip gcc-47b653bd9f7fa1a34bddeec249d8ca65e5a00c15.tar.gz gcc-47b653bd9f7fa1a34bddeec249d8ca65e5a00c15.tar.bz2 | |
S/390: Fix mode iterators vmal, vmah, and vmalh.
gcc/ChangeLog:
2015-09-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/vx-builtins.md ("vec_vmal<mode>", "vec_vmah<mode>")
("vec_vmalh<mode>"): Change mode iterator from VI_HW to VI_HW_QHS.
From-SVN: r227636
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/s390/vx-builtins.md | 30 |
2 files changed, 20 insertions, 15 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e882ec3..aff3fd9 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,10 @@ 2015-09-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com> + * config/s390/vx-builtins.md ("vec_vmal<mode>", "vec_vmah<mode>") + ("vec_vmalh<mode>"): Change mode iterator from VI_HW to VI_HW_QHS. + +2015-09-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com> + * config/s390/s390.c: Add V1TImode to constant pool modes. 2015-09-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com> diff --git a/gcc/config/s390/vx-builtins.md b/gcc/config/s390/vx-builtins.md index 35ada13..7e20d2b 100644 --- a/gcc/config/s390/vx-builtins.md +++ b/gcc/config/s390/vx-builtins.md @@ -870,11 +870,11 @@ ; vec_mladd -> vec_vmal ; vmalb, vmalh, vmalf, vmalg (define_insn "vec_vmal<mode>" - [(set (match_operand:VI_HW 0 "register_operand" "=v") - (unspec:VI_HW [(match_operand:VI_HW 1 "register_operand" "v") - (match_operand:VI_HW 2 "register_operand" "v") - (match_operand:VI_HW 3 "register_operand" "v")] - UNSPEC_VEC_VMAL))] + [(set (match_operand:VI_HW_QHS 0 "register_operand" "=v") + (unspec:VI_HW_QHS [(match_operand:VI_HW_QHS 1 "register_operand" "v") + (match_operand:VI_HW_QHS 2 "register_operand" "v") + (match_operand:VI_HW_QHS 3 "register_operand" "v")] + UNSPEC_VEC_VMAL))] "TARGET_VX" "vmal<bhfgq><w>\t%v0,%v1,%v2,%v3" [(set_attr "op_type" "VRR")]) @@ -883,22 +883,22 @@ ; vmahb; vmahh, vmahf, vmahg (define_insn "vec_vmah<mode>" - [(set (match_operand:VI_HW 0 "register_operand" "=v") - (unspec:VI_HW [(match_operand:VI_HW 1 "register_operand" "v") - (match_operand:VI_HW 2 "register_operand" "v") - (match_operand:VI_HW 3 "register_operand" "v")] - UNSPEC_VEC_VMAH))] + [(set (match_operand:VI_HW_QHS 0 "register_operand" "=v") + (unspec:VI_HW_QHS [(match_operand:VI_HW_QHS 1 "register_operand" "v") + (match_operand:VI_HW_QHS 2 "register_operand" "v") + (match_operand:VI_HW_QHS 3 "register_operand" "v")] + UNSPEC_VEC_VMAH))] "TARGET_VX" "vmah<bhfgq>\t%v0,%v1,%v2,%v3" [(set_attr "op_type" "VRR")]) ; vmalhb; vmalhh, vmalhf, vmalhg (define_insn "vec_vmalh<mode>" - [(set (match_operand:VI_HW 0 "register_operand" "=v") - (unspec:VI_HW [(match_operand:VI_HW 1 "register_operand" "v") - (match_operand:VI_HW 2 "register_operand" "v") - (match_operand:VI_HW 3 "register_operand" "v")] - UNSPEC_VEC_VMALH))] + [(set (match_operand:VI_HW_QHS 0 "register_operand" "=v") + (unspec:VI_HW_QHS [(match_operand:VI_HW_QHS 1 "register_operand" "v") + (match_operand:VI_HW_QHS 2 "register_operand" "v") + (match_operand:VI_HW_QHS 3 "register_operand" "v")] + UNSPEC_VEC_VMALH))] "TARGET_VX" "vmalh<bhfgq>\t%v0,%v1,%v2,%v3" [(set_attr "op_type" "VRR")]) |