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authorJames Greenhalgh <james.greenhalgh@arm.com>2014-06-23 09:04:40 +0000
committerJames Greenhalgh <jgreenhalgh@gcc.gnu.org>2014-06-23 09:04:40 +0000
commit463036be82cef539763c51afd5d94c51bd9eb66c (patch)
tree45575022eafbc5ae469d2e55f7b5139d2d38cc39 /gcc
parent1cff83e21d7dadcb976a0c624636b5411fe80904 (diff)
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[AArch64] Implement ADD in vector registers for 32-bit scalar values.
gcc/ * config/aarch64/aarch64.md (*addsi3_aarch64): Add alternative in vector registers. gcc/testsuite/ * gcc.target/aarch64/scalar_shift_1.c: Fix expected assembler. From-SVN: r211887
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/config/aarch64/aarch64.md9
-rw-r--r--gcc/testsuite/ChangeLog4
-rw-r--r--gcc/testsuite/gcc.target/aarch64/scalar_shift_1.c2
4 files changed, 14 insertions, 6 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c01cda3..4e0f2d1 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2014-06-23 James Greenhalgh <james.greenhalgh@arm.com>
+
+ * config/aarch64/aarch64.md (*addsi3_aarch64): Add alternative in
+ vector registers.
+
2014-06-23 Jan Hubicka <hubicka@ucw.cz>
* lto-cgraph.c (lto_output_node, input_node): Set/get init/fini priority
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 7f8bb82..5f5b4ff 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -1157,16 +1157,17 @@
(define_insn "*addsi3_aarch64"
[(set
- (match_operand:SI 0 "register_operand" "=rk,rk,rk")
+ (match_operand:SI 0 "register_operand" "=rk,rk,w,rk")
(plus:SI
- (match_operand:SI 1 "register_operand" "%rk,rk,rk")
- (match_operand:SI 2 "aarch64_plus_operand" "I,r,J")))]
+ (match_operand:SI 1 "register_operand" "%rk,rk,w,rk")
+ (match_operand:SI 2 "aarch64_plus_operand" "I,r,w,J")))]
""
"@
add\\t%w0, %w1, %2
add\\t%w0, %w1, %w2
+ add\\t%0.2s, %1.2s, %2.2s
sub\\t%w0, %w1, #%n2"
- [(set_attr "type" "alu_imm,alu_reg,alu_imm")]
+ [(set_attr "type" "alu_imm,alu_reg,neon_add,alu_imm")]
)
;; zero_extend version of above
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 0b45987..582fcc1 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2014-06-23 James Greenhalgh <james.greenhalgh@arm.com>
+
+ * gcc.target/aarch64/scalar_shift_1.c: Fix expected assembler.
+
2014-06-20 Jan Hubicka <hubicka@ucw.cz>
* gcc.dg/localalias.c: Fix broken commit.
diff --git a/gcc/testsuite/gcc.target/aarch64/scalar_shift_1.c b/gcc/testsuite/gcc.target/aarch64/scalar_shift_1.c
index 7cb17f8..826bafc 100644
--- a/gcc/testsuite/gcc.target/aarch64/scalar_shift_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/scalar_shift_1.c
@@ -193,7 +193,6 @@ test_corners_sisd_di (Int64x1 b)
return b;
}
/* { dg-final { scan-assembler "sshr\td\[0-9\]+,\ d\[0-9\]+,\ 63" } } */
-/* { dg-final { scan-assembler "shl\td\[0-9\]+,\ d\[0-9\]+,\ 1" } } */
Int32x1
test_corners_sisd_si (Int32x1 b)
@@ -207,7 +206,6 @@ test_corners_sisd_si (Int32x1 b)
return b;
}
/* { dg-final { scan-assembler "sshr\tv\[0-9\]+\.2s,\ v\[0-9\]+\.2s,\ 31" } } */
-/* { dg-final { scan-assembler "shl\tv\[0-9\]+\.2s,\ v\[0-9\]+\.2s,\ 1" } } */