retire mem_signal_fence pattern

	* config/s390/s390.md (mem_signal_fence): Remove.
	* doc/md.texi (mem_signal_fence): Remove.
	* optabs.c (expand_mem_signal_fence): Remove uses of mem_signal_fence.
	Update comments.
	* target-insns.def (mem_signal_fence): Remove.

From-SVN: r251597

5 files changed, 13 insertions, 35 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 71244e9..60824ea 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2017-09-01  Alexander Monakov  <amonakov@ispras.ru>
+
+	* config/s390/s390.md (mem_signal_fence): Remove.
+	* doc/md.texi (mem_signal_fence): Remove.
+	* optabs.c (expand_mem_signal_fence): Remove uses of mem_signal_fence.
+	Update comments.
+	* target-insns.def (mem_signal_fence): Remove.
+
 2017-09-01  Jakub Jelinek  <jakub@redhat.com>
 
 	PR sanitizer/81902
diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
index d1ac0b8..1d63523 100644
--- a/gcc/config/s390/s390.md
+++ b/gcc/config/s390/s390.md
@@ -10084,15 +10084,6 @@
 ; memory barrier patterns.
 ;
 
-(define_expand "mem_signal_fence"
-  [(match_operand:SI 0 "const_int_operand")]		;; model
-  ""
-{
-  /* The s390 memory model is strong enough not to require any
-     barrier in order to synchronize a thread with itself.  */
-  DONE;
-})
-
 (define_expand "mem_thread_fence"
   [(match_operand:SI 0 "const_int_operand")]		;; model
   ""
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index 64a137e..ed78df8 100644
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -7059,19 +7059,6 @@ If this pattern is not defined, the compiler falls back to expanding the
 @code{memory_barrier} pattern, then to emitting @code{__sync_synchronize}
 library call, and finally to just placing a compiler memory barrier.
 
-@cindex @code{mem_signal_fence@var{mode}} instruction pattern
-@item @samp{mem_signal_fence@var{mode}}
-This pattern emits code required to implement a signal fence with
-memory model semantics.  Operand 0 is the memory model to be used.
-
-This pattern should impact the compiler optimizers the same way that
-mem_signal_fence does, but it does not need to issue any barrier
-instructions.
-
-If this pattern is not specified, all memory models except
-@code{__ATOMIC_RELAXED} will result in issuing a @code{sync_synchronize}
-barrier pattern.
-
 @cindex @code{get_thread_pointer@var{mode}} instruction pattern
 @cindex @code{set_thread_pointer@var{mode}} instruction pattern
 @item @samp{get_thread_pointer@var{mode}}
diff --git a/gcc/optabs.c b/gcc/optabs.c
index d30e4c6..2c4de74 100644
--- a/gcc/optabs.c
+++ b/gcc/optabs.c
@@ -6318,22 +6318,15 @@ expand_mem_thread_fence (enum memmodel model)
     expand_asm_memory_barrier ();
 }
 
-/* This routine will either emit the mem_signal_fence pattern or issue a 
-   sync_synchronize to generate a fence for memory model MEMMODEL.  */
+/* Emit a signal fence with given memory model.  */
 
 void
 expand_mem_signal_fence (enum memmodel model)
 {
-  if (targetm.have_mem_signal_fence ())
-    emit_insn (targetm.gen_mem_signal_fence (GEN_INT (model)));
-  else if (!is_mm_relaxed (model))
-    {
-      /* By default targets are coherent between a thread and the signal
-	 handler running on the same thread.  Thus this really becomes a
-	 compiler barrier, in that stores must not be sunk past
-	 (or raised above) a given point.  */
-      expand_asm_memory_barrier ();
-    }
+  /* No machine barrier is required to implement a signal fence, but
+     a compiler memory barrier must be issued, except for relaxed MM.  */
+  if (!is_mm_relaxed (model))
+    expand_asm_memory_barrier ();
 }
 
 /* This function expands the atomic load operation:
diff --git a/gcc/target-insns.def b/gcc/target-insns.def
index fb92f72..4669439 100644
--- a/gcc/target-insns.def
+++ b/gcc/target-insns.def
@@ -58,7 +58,6 @@ DEF_TARGET_INSN (indirect_jump, (rtx x0))
 DEF_TARGET_INSN (insv, (rtx x0, rtx x1, rtx x2, rtx x3))
 DEF_TARGET_INSN (jump, (rtx x0))
 DEF_TARGET_INSN (load_multiple, (rtx x0, rtx x1, rtx x2))
-DEF_TARGET_INSN (mem_signal_fence, (rtx x0))
 DEF_TARGET_INSN (mem_thread_fence, (rtx x0))
 DEF_TARGET_INSN (memory_barrier, (void))
 DEF_TARGET_INSN (movstr, (rtx x0, rtx x1, rtx x2))