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| author | Andrey Belevantsev <abel@ispras.ru> | 2013-02-27 12:56:08 +0400 |
|---|---|---|
| committer | Andrey Belevantsev <abel@gcc.gnu.org> | 2013-02-27 12:56:08 +0400 |
| commit | 436a956a80a5b083348ce9c336b59ae04f883f2e (patch) | |
| tree | 9ce85787bc76ebf33091259846b485916408196d /gcc | |
| parent | 0fcb564b72f58f8d3fa3351fbad33d32b63697ca (diff) | |
| download | gcc-436a956a80a5b083348ce9c336b59ae04f883f2e.zip gcc-436a956a80a5b083348ce9c336b59ae04f883f2e.tar.gz gcc-436a956a80a5b083348ce9c336b59ae04f883f2e.tar.bz2 | |
re PR middle-end/45472 ([Middle-end volatile semantics] ICE: in move_op_ascend, at sel-sched.c:6124 with -fselective-scheduling2)
PR middle-end/45472
gcc/
* sel-sched-ir.c (merge_expr): Also change vinsn of merged expr
when the may_trap_p bit of the exprs being merged differs.
Reorder tests for speculativeness in the logical and operator.
testsuite/
* gcc.dg/45472.c: New test.
From-SVN: r196308
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 9 | ||||
| -rw-r--r-- | gcc/sel-sched-ir.c | 8 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.dg/pr45472.c | 21 |
4 files changed, 41 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 86426e7..61ea521 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2013-02-27 Andrey Belevantsev <abel@ispras.ru> + + PR middle-end/45472 + + * sel-sched-ir.c (merge_expr): Also change vinsn of merged expr + when the may_trap_p bit of the exprs being merged differs. + + Reorder tests for speculativeness in the logical and operator. + 2013-02-27 Jakub Jelinek <jakub@redhat.com> * incpath.c (add_standard_paths): Use reconcat instead of concat diff --git a/gcc/sel-sched-ir.c b/gcc/sel-sched-ir.c index 39dc52f..ae17351 100644 --- a/gcc/sel-sched-ir.c +++ b/gcc/sel-sched-ir.c @@ -1866,8 +1866,12 @@ merge_expr (expr_t to, expr_t from, insn_t split_point) /* Make sure that speculative pattern is propagated into exprs that have non-speculative one. This will provide us with consistent speculative bits and speculative patterns inside expr. */ - if (EXPR_SPEC_DONE_DS (to) == 0 - && EXPR_SPEC_DONE_DS (from) != 0) + if ((EXPR_SPEC_DONE_DS (from) != 0 + && EXPR_SPEC_DONE_DS (to) == 0) + /* Do likewise for volatile insns, so that we always retain + the may_trap_p bit on the resulting expression. */ + || (VINSN_MAY_TRAP_P (EXPR_VINSN (from)) + && !VINSN_MAY_TRAP_P (EXPR_VINSN (to)))) change_vinsn_in_expr (to, EXPR_VINSN (from)); merge_expr_data (to, from, split_point); diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 9f00b87..20e9673 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2013-02-27 Andrey Belevantsev <abel@ispras.ru> + + PR middle-end/45472 + * gcc.dg/pr45472.c: New test. + 2013-02-26 Marek Polacek <polacek@redhat.com> PR tree-optimization/56426 diff --git a/gcc/testsuite/gcc.dg/pr45472.c b/gcc/testsuite/gcc.dg/pr45472.c new file mode 100644 index 0000000..573e83d --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr45472.c @@ -0,0 +1,21 @@ +/* { dg-do compile { target powerpc*-*-* ia64-*-* x86_64-*-* } } */ +/* { dg-options "-O -fschedule-insns2 -fselective-scheduling2" } */ + +struct S +{ + volatile long vl; + int i; +}; +struct S s1, s2; + +void +foo (int j, int c) +{ + int i; + for (i = 0; i <= j; i++) + { + if (c) + s2.vl += s1.vl; + s1 = s2; + } +} |