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| author | Richard Henderson <rth@redhat.com> | 2012-01-24 13:11:49 -0800 |
|---|---|---|
| committer | Richard Henderson <rth@gcc.gnu.org> | 2012-01-24 13:11:49 -0800 |
| commit | 42cf06094db7547fa4ec123f144180882b5a9f5b (patch) | |
| tree | f535526f6c0ea5c6e4a5f7018c80c2d1271f1daf /gcc | |
| parent | 625d0ab2fd2894879590ccce150e71516c504288 (diff) | |
| download | gcc-42cf06094db7547fa4ec123f144180882b5a9f5b.zip gcc-42cf06094db7547fa4ec123f144180882b5a9f5b.tar.gz gcc-42cf06094db7547fa4ec123f144180882b5a9f5b.tar.bz2 | |
optabs.c (maybe_emit_atomic_test_and_set): Mark model unused.
* optabs.c (maybe_emit_atomic_test_and_set): Mark model unused.
Allow non-QImode mem inputs.
From-SVN: r183497
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/optabs.c | 10 |
2 files changed, 13 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 53d51d2..3581f4b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2012-01-25 Richard Henderson <rth@redhat.com> + + * optabs.c (maybe_emit_atomic_test_and_set): Allow non-QImode + mem inputs. + 2012-01-24 Richard Sandiford <rdsandiford@googlemail.com> * optabs.c (gen_atomic_test_and_set): Use each argument. diff --git a/gcc/optabs.c b/gcc/optabs.c index d9a93cc..fb01320 100644 --- a/gcc/optabs.c +++ b/gcc/optabs.c @@ -1,7 +1,7 @@ /* Expand the basic unary and binary arithmetic operations, for GNU compiler. Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, - 2011 Free Software Foundation, Inc. + 2011, 2012 Free Software Foundation, Inc. This file is part of GCC. @@ -7330,7 +7330,13 @@ maybe_emit_atomic_test_and_set (rtx target, rtx mem, enum memmodel model) /* ??? We only support test-and-set on single bytes at the moment. We'd have to change the builtin to allow wider memories. */ gcc_checking_assert (id->operand[1].mode == QImode); - gcc_checking_assert (GET_MODE (mem) == QImode); + + /* While we always get QImode from __atomic_test_and_set, we get + other memory modes from __sync_lock_test_and_set. Note that we + use no endian adjustment here. This matches the 4.6 behavior + in the Sparc backend. */ + if (GET_MODE (mem) != QImode) + mem = adjust_address_nv (mem, QImode, 0); if (target == NULL || GET_MODE (target) != pat_bool_mode) target = gen_reg_rtx (pat_bool_mode); |