testsuite: aarch64: arm: Remove redundant dg-do run in advsimd-intrinsics tests

Tests under advsimd-intrinsics are controlled by
advsimd-intrinsics.exp which computes the adequate dg-do-what
depending on the actual target, it should not be redefined in the
tests, except when the action can never be 'run'.

This currently makes no difference, but it would when we remove
dg-skip-if for arm targets from tests that could at least be compiled
(e.g. vst1x2.c)

	gcc/testsuite/

	* gcc.target/aarch64/advsimd-intrinsics/vabdh_f16_1.c: Remove
	dg-do directive.
	* gcc.target/aarch64/advsimd-intrinsics/vabsh_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vaddh_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcageh_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcagth_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcaleh_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcalth_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vceqh_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vceqzh_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcgeh_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcgezh_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcgth_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcgtzh_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcleh_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vclezh_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vclth_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcltzh_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvtah_s16_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvtah_s32_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvtah_s64_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvtah_u16_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvtah_u32_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvtah_u64_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s32_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s64_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u32_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u64_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s32_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s64_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u32_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u64_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s16_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s32_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s64_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u16_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u32_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u64_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvth_s16_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvth_s32_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvth_s64_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvth_u16_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvth_u32_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvth_u64_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s16_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s32_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s64_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u16_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u32_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u64_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s16_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s32_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s64_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u16_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u32_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u64_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvtph_s16_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvtph_s32_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvtph_s64_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvtph_u16_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvtph_u32_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcvtph_u64_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vdiv_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vdivh_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vduph_lane.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vfmah_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vfmas_lane_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vfmas_n_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vfmash_lane_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vfmsh_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vld1x2.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vld1x3.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vld1x4.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vmaxh_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vmaxnmh_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vmaxnmv_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vmaxv_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vminh_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vminnmh_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vminnmv_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vminv_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vmul_lane_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vmulh_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vmulh_lane_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vmulx_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vmulx_lane_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vmulx_n_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vmulxh_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vmulxh_lane_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vnegh_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vpminmaxnm_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vqrshrn_high_n.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vqrshrun_high_n.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vqshrn_high_n.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vqshrun_high_n.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vrecpeh_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vrecpsh_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vrecpxh_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vrndah_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vrndh_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vrndi_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vrndih_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vrndmh_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vrndnh_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vrndph_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vrndxh_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vrsqrteh_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vrsqrtsh_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vsqrt_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vsqrth_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vst1x2.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vst1x3.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vst1x4.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vsubh_f16_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vtrn_half.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vuzp_half.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vzip_half.c: Likewise.

120 files changed, 0 insertions, 120 deletions

diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabdh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabdh_f16_1.c
index 3a5efa5..7478323 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabdh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabdh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabsh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabsh_f16_1.c
index 16a986a..ebae422 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabsh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabsh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddh_f16_1.c
index 4b0e242..dd62e32b 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcageh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcageh_f16_1.c
index 0bebec7..70279d2 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcageh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcageh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcagth_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcagth_f16_1.c
index 68ce599..2e8205d 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcagth_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcagth_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcaleh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcaleh_f16_1.c
index 1b5a09b..eae7189 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcaleh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcaleh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcalth_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcalth_f16_1.c
index 766c783..f23900e 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcalth_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcalth_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqh_f16_1.c
index 8f5c14b..a735602 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqzh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqzh_f16_1.c
index ccfecf42..2792c2c1 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqzh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqzh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgeh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgeh_f16_1.c
index 161c7a0..6b4e028 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgeh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgeh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgezh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgezh_f16_1.c
index 2d3cd8a..cf44631 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgezh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgezh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgth_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgth_f16_1.c
index 0d35385..c95a455 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgth_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgth_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgtzh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgtzh_f16_1.c
index ca23e3f..a801785 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgtzh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgtzh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcleh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcleh_f16_1.c
index f51cac3..9d17b05 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcleh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcleh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclezh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclezh_f16_1.c
index 57901c8..94e2f5d 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclezh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclezh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclth_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclth_f16_1.c
index 3218873..a1c8c50 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclth_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclth_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcltzh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcltzh_f16_1.c
index af6a5b6..9620001 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcltzh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcltzh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s16_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s16_f16_1.c
index 2084c30..05cda23 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s16_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s16_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s32_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s32_f16_1.c
index ebfd62a..f567e9b 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s32_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s32_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s64_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s64_f16_1.c
index a27871b..842005b 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s64_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s64_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u16_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u16_f16_1.c
index 0642ae0..1e23056 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u16_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u16_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u32_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u32_f16_1.c
index 5ae28fc..719769a 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u32_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u32_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u64_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u64_f16_1.c
index 2d197b4..77b226b 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u64_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u64_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s16_1.c
index 540b637..32a7f92 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s32_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s32_1.c
index 2173a0e..a24f787 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s32_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s32_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s64_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s64_1.c
index 5f17dbe..7a7617d 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s64_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s64_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u16_1.c
index 426700c..7c6ad5a 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u32_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u32_1.c
index 1583202..afe6c03 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u32_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u32_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u64_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u64_1.c
index 3413de0..6c988e6 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u64_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u64_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s16_1.c
index 25265d1..87dcfe5 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s32_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s32_1.c
index 9ce9558..944b325 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s32_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s32_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s64_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s64_1.c
index f0adb09..2756d0e 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s64_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s64_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u16_1.c
index 74c4e60..874726d 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u32_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u32_1.c
index d308c35..4ee9dc7 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u32_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u32_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u64_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u64_1.c
index b393767..ef61a24 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u64_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u64_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s16_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s16_f16_1.c
index 247f7c9..8e725c7 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s16_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s16_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s32_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s32_f16_1.c
index 6e2ee50..f09cab0 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s32_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s32_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s64_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s64_f16_1.c
index 27502c2..668be0f 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s64_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s64_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u16_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u16_f16_1.c
index e5f57f1..d3aeb69 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u16_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u16_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u32_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u32_f16_1.c
index 188f60c..c66ee58 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u32_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u32_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u64_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u64_f16_1.c
index cfc33c2..dd2dfbd 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u64_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u64_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s16_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s16_f16_1.c
index 9965654..21055db 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s16_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s16_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s32_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s32_f16_1.c
index 6bff954..c6d8481 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s32_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s32_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s64_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s64_f16_1.c
index c7b3d17..a8bb322 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s64_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s64_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u16_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u16_f16_1.c
index e3c5d3a..a2300b4 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u16_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u16_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u32_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u32_f16_1.c
index d5807d7..1de5551 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u32_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u32_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u64_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u64_f16_1.c
index a904e5e..a5b346f 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u64_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u64_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s16_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s16_f16_1.c
index ef0132a..d20e2dc 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s16_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s16_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s32_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s32_f16_1.c
index f4f7b37..474cd20 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s32_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s32_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s64_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s64_f16_1.c
index 7b5b16f..b564749 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s64_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s64_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u16_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u16_f16_1.c
index db56171..1e5c289 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u16_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u16_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u32_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u32_f16_1.c
index 6cda3b6..3ee2194 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u32_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u32_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u64_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u64_f16_1.c
index cae69a3..175bcf2 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u64_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u64_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s16_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s16_f16_1.c
index dec8d85..ef5acbb 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s16_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s16_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s32_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s32_f16_1.c
index 94c333e..2f9855c 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s32_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s32_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s64_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s64_f16_1.c
index 0048b5b..f159ac2 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s64_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s64_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u16_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u16_f16_1.c
index 0a95cea..39d92ec 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u16_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u16_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u32_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u32_f16_1.c
index 97d5fba..fe605b5 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u32_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u32_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u64_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u64_f16_1.c
index 3b1b273..597a2e0 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u64_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u64_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s16_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s16_f16_1.c
index 5ff0d22..d58cad8 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s16_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s16_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s32_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s32_f16_1.c
index 105d236..a2a246d 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s32_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s32_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s64_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s64_f16_1.c
index 290c5b1..a4905b1 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s64_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s64_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u16_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u16_f16_1.c
index e367dad..8e443bd 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u16_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u16_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u32_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u32_f16_1.c
index d66adcd..63b793bc 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u32_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u32_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u64_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u64_f16_1.c
index 0229099..b1238de 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u64_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u64_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdiv_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdiv_f16_1.c
index c0103fb..99c3e95 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdiv_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdiv_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
 /* { dg-add-options arm_v8_2a_fp16_neon } */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdivh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdivh_f16_1.c
index 6a99109..c5b458b 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdivh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdivh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vduph_lane.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vduph_lane.c
index c9d553a..789d9e2 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vduph_lane.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vduph_lane.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 #include <arm_neon.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmah_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmah_f16_1.c
index 1ac6b67..aae9a94 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmah_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmah_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_lane_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_lane_f16_1.c
index 00c95d3..363d25f 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_lane_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_lane_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
 /* { dg-add-options arm_v8_2a_fp16_neon } */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_n_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_n_f16_1.c
index f01aefb..72416dc 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_n_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_n_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
 /* { dg-add-options arm_v8_2a_fp16_neon } */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmash_lane_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmash_lane_f16_1.c
index ea751da..57ff684 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmash_lane_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmash_lane_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_neon } */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmsh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmsh_f16_1.c
index 77021be..d2486f1 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmsh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmsh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c
index 6e56ff1..0892ce7 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c
@@ -1,5 +1,4 @@
 /* We haven't implemented these intrinsics for arm yet.  */
-/* { dg-do run } */
 /* { dg-skip-if "unimplemented" { arm*-*-* } } */
 /* { dg-options "-O3" } */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x3.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x3.c
index 42aeadf..9465e4a 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x3.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x3.c
@@ -1,5 +1,4 @@
 /* We haven't implemented these intrinsics for arm yet.  */
-/* { dg-do run } */
 /* { dg-skip-if "unimplemented" { arm*-*-* } } */
 /* { dg-options "-O3" } */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x4.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x4.c
index 694fda8..a1461fd 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x4.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x4.c
@@ -1,5 +1,4 @@
 /* We haven't implemented these intrinsics for arm yet.  */
-/* { dg-do run } */
 /* { dg-skip-if "unimplemented" { arm*-*-* } } */
 /* { dg-options "-O3" } */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxh_f16_1.c
index 182463e..763eb47 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmh_f16_1.c
index 4db4b84..5242d55 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmv_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmv_f16_1.c
index ce9872f..3b12e62 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmv_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmv_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
 /* { dg-add-options arm_v8_2a_fp16_neon } */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxv_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxv_f16_1.c
index 39c4897..bcb56fe 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxv_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxv_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
 /* { dg-add-options arm_v8_2a_fp16_neon } */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminh_f16_1.c
index d8efbca..9ee302f 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmh_f16_1.c
index f6b0216..e70bc6c 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmv_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmv_f16_1.c
index b7c5101..1910d9f 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmv_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmv_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
 /* { dg-add-options arm_v8_2a_fp16_neon } */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminv_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminv_f16_1.c
index c454a53..3ab5432 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminv_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminv_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
 /* { dg-add-options arm_v8_2a_fp16_neon } */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmul_lane_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmul_lane_f16_1.c
index 1719d56..d470308 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmul_lane_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmul_lane_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
 /* { dg-add-options arm_v8_2a_fp16_neon } */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_f16_1.c
index 09684d2..85fe687 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_lane_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_lane_f16_1.c
index 4cd5c37..fe7cc84 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_lane_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_lane_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_neon } */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_f16_1.c
index 51bbead..1b5b869 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
 /* { dg-add-options arm_v8_2a_fp16_neon } */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_lane_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_lane_f16_1.c
index f90a36d..2a4f24f 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_lane_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_lane_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
 /* { dg-add-options arm_v8_2a_fp16_neon } */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_n_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_n_f16_1.c
index 140647b..d1fd316 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_n_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_n_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
 /* { dg-add-options arm_v8_2a_fp16_neon } */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_f16_1.c
index 66c744c..1c85773 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_lane_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_lane_f16_1.c
index 90a5be8..d2df24c 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_lane_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_lane_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_neon } */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vnegh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vnegh_f16_1.c
index 421d827..37ce039 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vnegh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vnegh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vpminmaxnm_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vpminmaxnm_f16_1.c
index c8df677..df3b83d 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vpminmaxnm_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vpminmaxnm_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
 /* { dg-add-options arm_v8_2a_fp16_neon } */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrn_high_n.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrn_high_n.c
index 6ebe074..07d873d 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrn_high_n.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrn_high_n.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 #include <arm_neon.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrun_high_n.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrun_high_n.c
index 49d319d..e8f464d 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrun_high_n.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrun_high_n.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 #include <arm_neon.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrn_high_n.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrn_high_n.c
index 8d06f11..5a3ea62 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrn_high_n.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrn_high_n.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 #include <arm_neon.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrun_high_n.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrun_high_n.c
index e8235fe..80c66fd 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrun_high_n.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrun_high_n.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 #include <arm_neon.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpeh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpeh_f16_1.c
index 3740d6a..f0d0da7 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpeh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpeh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpsh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpsh_f16_1.c
index 3e6b24e..9dd8981 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpsh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpsh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpxh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpxh_f16_1.c
index fc02b6b..9593b18 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpxh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpxh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndah_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndah_f16_1.c
index bcf47f6..6b40e29 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndah_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndah_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndh_f16_1.c
index 3c4649e..691fcd7 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndi_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndi_f16_1.c
index 7a4620b..1c596b0 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndi_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndi_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
 /* { dg-add-options arm_v8_2a_fp16_neon } */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndih_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndih_f16_1.c
index 4a7b721..6cbcf7c 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndih_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndih_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndmh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndmh_f16_1.c
index 9af357d..7accb45 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndmh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndmh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndnh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndnh_f16_1.c
index eb4b27d..bc841b5 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndnh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndnh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndph_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndph_f16_1.c
index 3fa9749..856a661 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndph_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndph_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndxh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndxh_f16_1.c
index eb4b27d..bc841b5 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndxh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndxh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrteh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrteh_f16_1.c
index 7c0e619..02d8bb7 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrteh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrteh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrtsh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrtsh_f16_1.c
index a9753a4..b32c44c 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrtsh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrtsh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrt_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrt_f16_1.c
index 82249a7..77f9460 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrt_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrt_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
 /* { dg-add-options arm_v8_2a_fp16_neon } */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrth_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrth_f16_1.c
index 7d03827..89b910c 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrth_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrth_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x2.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x2.c
index 69be40a..3cf5eb3 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x2.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x2.c
@@ -1,5 +1,4 @@
 /* We haven't implemented these intrinsics for arm yet.  */
-/* { dg-do run } */
 /* { dg-skip-if "unimplemented" { arm*-*-* } } */
 /* { dg-options "-O3" } */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x3.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x3.c
index 4d42bcc..c05f8e7 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x3.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x3.c
@@ -1,5 +1,4 @@
 /* We haven't implemented these intrinsics for arm yet.  */
-/* { dg-do run } */
 /* { dg-skip-if "unimplemented" { arm*-*-* } } */
 /* { dg-options "-O3" } */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x4.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x4.c
index ddc7fa5..a9867c3 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x4.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x4.c
@@ -1,5 +1,4 @@
 /* We haven't implemented these intrinsics for arm yet.  */
-/* { dg-do run } */
 /* { dg-skip-if "unimplemented" { arm*-*-* } } */
 /* { dg-options "-O3" } */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsubh_f16_1.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsubh_f16_1.c
index a7aba11..d24a599 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsubh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsubh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vtrn_half.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vtrn_half.c
index 6debfe5..c9485c3 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vtrn_half.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vtrn_half.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 #include <arm_neon.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vuzp_half.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vuzp_half.c
index fe35e15..12ae8b0 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vuzp_half.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vuzp_half.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 #include <arm_neon.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vzip_half.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vzip_half.c
index 5914192..65bc140 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vzip_half.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vzip_half.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 #include <arm_neon.h>