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| author | Jan Hubicka <hubicka@ucw.cz> | 2017-10-12 17:36:05 +0200 |
|---|---|---|
| committer | Jan Hubicka <hubicka@gcc.gnu.org> | 2017-10-12 15:36:05 +0000 |
| commit | 3edf8a985bfd08f0b8585c514b2640d9ea5e6a61 (patch) | |
| tree | 3bde04f6d6ebfa13e0efcfae1748909f8c89b307 /gcc | |
| parent | 7159f19c1d94f5fd8bb3a43c87745f019ee090e2 (diff) | |
| download | gcc-3edf8a985bfd08f0b8585c514b2640d9ea5e6a61.zip gcc-3edf8a985bfd08f0b8585c514b2640d9ea5e6a61.tar.gz gcc-3edf8a985bfd08f0b8585c514b2640d9ea5e6a61.tar.bz2 | |
* x86-tune-sched.c (ix86_adjust_cost): Fix Zen support.
From-SVN: r253684
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/config/i386/x86-tune-sched.c | 30 |
2 files changed, 33 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ad116af..79316bb 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2017-10-12 Jan Hubicka <hubicka@ucw.cz> + + * x86-tune-sched.c (ix86_adjust_cost): Fix Zen support. + 2017-10-12 Uros Bizjak <ubizjak@gmail.com> * config/alpha/alpha.c (alpha_split_conditional_move): diff --git a/gcc/config/i386/x86-tune-sched.c b/gcc/config/i386/x86-tune-sched.c index 51fa77c..aac2bae 100644 --- a/gcc/config/i386/x86-tune-sched.c +++ b/gcc/config/i386/x86-tune-sched.c @@ -352,7 +352,6 @@ ix86_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep_insn, int cost, case PROCESSOR_BDVER2: case PROCESSOR_BDVER3: case PROCESSOR_BDVER4: - case PROCESSOR_ZNVER1: case PROCESSOR_BTVER1: case PROCESSOR_BTVER2: case PROCESSOR_GENERIC: @@ -392,6 +391,35 @@ ix86_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep_insn, int cost, } break; + case PROCESSOR_ZNVER1: + /* Stack engine allows to execute push&pop instructions in parall. */ + if ((insn_type == TYPE_PUSH || insn_type == TYPE_POP) + && (dep_insn_type == TYPE_PUSH || dep_insn_type == TYPE_POP)) + return 0; + + memory = get_attr_memory (insn); + + /* Show ability of reorder buffer to hide latency of load by executing + in parallel with previous instruction in case + previous instruction is not needed to compute the address. */ + if ((memory == MEMORY_LOAD || memory == MEMORY_BOTH) + && !ix86_agi_dependent (dep_insn, insn)) + { + enum attr_unit unit = get_attr_unit (insn); + int loadcost; + + if (unit == UNIT_INTEGER || unit == UNIT_UNKNOWN) + loadcost = 4; + else + loadcost = 7; + + if (cost >= loadcost) + cost -= loadcost; + else + cost = 0; + } + break; + case PROCESSOR_CORE2: case PROCESSOR_NEHALEM: case PROCESSOR_SANDYBRIDGE: |