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| author | Alexander Ivchenko <alexander.ivchenko@intel.com> | 2013-10-11 14:05:40 +0000 |
|---|---|---|
| committer | Kirill Yukhin <kyukhin@gcc.gnu.org> | 2013-10-11 14:05:40 +0000 |
| commit | 3c87b77b1ea5bc5920e846d9c666bf4c1780148b (patch) | |
| tree | e6a414d14f1c3a844f56e0829521aace49aac5ab /gcc | |
| parent | 50e60d7d5d0f126a57cc9da1f93e7c73dc17c6bb (diff) | |
| download | gcc-3c87b77b1ea5bc5920e846d9c666bf4c1780148b.zip gcc-3c87b77b1ea5bc5920e846d9c666bf4c1780148b.tar.gz gcc-3c87b77b1ea5bc5920e846d9c666bf4c1780148b.tar.bz2 | |
sse.md (VI48F_256_512): New.
* config/i386/sse.md (VI48F_256_512): New.
(avx2_permvar<mode>): Change to ...
(<avx2_avx512f>_permvar<mode>): This.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
Co-Authored-By: Sergey Lega <sergey.s.lega@intel.com>
From-SVN: r203442
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 14 | ||||
| -rw-r--r-- | gcc/config/i386/sse.md | 16 |
2 files changed, 24 insertions, 6 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index bedc5d4..8177c62 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -8,6 +8,20 @@ Kirill Yukhin <kirill.yukhin@intel.com> Michael Zolotukhin <michael.v.zolotukhin@intel.com> + * config/i386/sse.md (VI48F_256_512): New. + (avx2_permvar<mode>): Change to ... + (<avx2_avx512f>_permvar<mode>): This. + +2013-10-11 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + * config/i386/i386.c (bdesc_args): Change corresponding pattern for __builtin_ia32_cvtps2dq, __builtin_ia32_cvtps2dq256. * config/i386/sse.md (VI4_AVX): New. diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 09f5ce4..c3f6c94 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -367,6 +367,10 @@ (define_mode_iterator VI8F_256 [V4DI V4DF]) (define_mode_iterator VI8F_256_512 [V4DI V4DF (V8DI "TARGET_AVX512F") (V8DF "TARGET_AVX512F")]) +(define_mode_iterator VI48F_256_512 + [V8SI V8SF + (V16SI "TARGET_AVX512F") (V16SF "TARGET_AVX512F") + (V8DI "TARGET_AVX512F") (V8DF "TARGET_AVX512F")]) ;; Mapping from float mode to required SSE level (define_mode_attr sse @@ -10834,17 +10838,17 @@ (set_attr "prefix" "vex") (set_attr "mode" "<sseinsnmode>")]) -(define_insn "avx2_permvar<mode>" - [(set (match_operand:VI4F_256 0 "register_operand" "=v") - (unspec:VI4F_256 - [(match_operand:VI4F_256 1 "nonimmediate_operand" "vm") - (match_operand:V8SI 2 "register_operand" "v")] +(define_insn "<avx2_avx512f>_permvar<mode>" + [(set (match_operand:VI48F_256_512 0 "register_operand" "=v") + (unspec:VI48F_256_512 + [(match_operand:VI48F_256_512 1 "nonimmediate_operand" "vm") + (match_operand:<sseintvecmode> 2 "register_operand" "v")] UNSPEC_VPERMVAR))] "TARGET_AVX2" "vperm<ssemodesuffix>\t{%1, %2, %0|%0, %2, %1}" [(set_attr "type" "sselog") (set_attr "prefix" "vex") - (set_attr "mode" "OI")]) + (set_attr "mode" "<sseinsnmode>")]) (define_expand "<avx2_avx512f>_perm<mode>" [(match_operand:VI8F_256_512 0 "register_operand") |