aboutsummaryrefslogtreecommitdiff
path: root/gcc
diff options
context:
space:
mode:
authorBill Schmidt <wschmidt@linux.vnet.ibm.com>2017-01-26 03:21:49 +0000
committerWilliam Schmidt <wschmidt@gcc.gnu.org>2017-01-26 03:21:49 +0000
commit3b5de3cb71e0771ee5f1abe88ad63e7613699b66 (patch)
tree565543f8c6df5230adbea666e3df871e7b8ff8e7 /gcc
parentf95129c12f944c7be668d81ff464856aeaa59376 (diff)
downloadgcc-3b5de3cb71e0771ee5f1abe88ad63e7613699b66.zip
gcc-3b5de3cb71e0771ee5f1abe88ad63e7613699b66.tar.gz
gcc-3b5de3cb71e0771ee5f1abe88ad63e7613699b66.tar.bz2
vsx-elemrev-4.c: Change expected code generation to accept D-mode memory accesses.
2017-01-25 Bill Schmidt <wschmidt@linux.vnet.ibm.com> * gcc.target/powerpc/vsx-elemrev-4.c: Change expected code generation to accept D-mode memory accesses. From-SVN: r244916
Diffstat (limited to 'gcc')
-rw-r--r--gcc/testsuite/ChangeLog5
-rw-r--r--gcc/testsuite/gcc.target/powerpc/vsx-elemrev-4.c7
2 files changed, 10 insertions, 2 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 6a30073..99bec45 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2017-01-25 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
+
+ * gcc.target/powerpc/vsx-elemrev-4.c: Change expected code
+ generation to accept D-mode memory accesses.
+
2017-01-25 Martin Sebor <msebor@redhat.com>
PR c++/71290
diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-4.c b/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-4.c
index a116316..f409463 100644
--- a/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-4.c
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-4.c
@@ -3,8 +3,11 @@
/* { dg-options "-mcpu=power9 -O0" } */
/* { dg-require-effective-target powerpc_p9vector_ok } */
/* { dg-skip-if "" { powerpc*-*-aix* } { "*" } { "" } } */
-/* { dg-final { scan-assembler-times "lxvx" 40 } } */
-/* { dg-final { scan-assembler-times "stxvx" 40 } } */
+
+/* Following will match either lxv or lxvx, either stxv or stxvx.
+ This is purposeful as either is fine. */
+/* { dg-final { scan-assembler-times "lxv" 40 } } */
+/* { dg-final { scan-assembler-times "stxv" 40 } } */
#include <altivec.h>