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author | H.J. Lu <hongjiu.lu@intel.com> | 2018-10-19 08:56:37 +0000 |
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committer | H.J. Lu <hjl@gcc.gnu.org> | 2018-10-19 01:56:37 -0700 |
commit | 3b1778b7c3ccec3d672824d185b8994e7fd023d0 (patch) | |
tree | 542e191bbc278844b17d1d68bb83f1d37c927544 /gcc | |
parent | 3664a0f184ad90a0aa65b473d180debce6402ab0 (diff) | |
download | gcc-3b1778b7c3ccec3d672824d185b8994e7fd023d0.zip gcc-3b1778b7c3ccec3d672824d185b8994e7fd023d0.tar.gz gcc-3b1778b7c3ccec3d672824d185b8994e7fd023d0.tar.bz2 |
i386: Use register_operand in AVX512 FMA with memory broadcast
Use "register_operand" in AVX512 FMA with memory broadcast when only
registers are allowed.
* config/i386/sse.md
(*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1):
Replace nonimmediate_operand with register_operand.
(*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_2):
Likewise.
(*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_3):
Likewise.
From-SVN: r265310
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 10 | ||||
-rw-r--r-- | gcc/config/i386/sse.md | 12 |
2 files changed, 16 insertions, 6 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1b91d7d..ee08f80 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,13 @@ +2018-10-19 H.J. Lu <hongjiu.lu@intel.com> + + * config/i386/sse.md + (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1): + Replace nonimmediate_operand with register_operand. + (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_2): + Likewise. + (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_3): + Likewise. + 2018-10-19 Ilya Leoshkevich <iii@linux.ibm.com> PR rtl-optimization/87596 diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 71684d6..06144dc 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -3749,8 +3749,8 @@ (define_insn "*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1" [(set (match_operand:VF_AVX512 0 "register_operand" "=v,v") (fma:VF_AVX512 - (match_operand:VF_AVX512 1 "nonimmediate_operand" "0,v") - (match_operand:VF_AVX512 2 "nonimmediate_operand" "v,0") + (match_operand:VF_AVX512 1 "register_operand" "0,v") + (match_operand:VF_AVX512 2 "register_operand" "v,0") (vec_duplicate:VF_AVX512 (match_operand:<ssescalarmode> 3 "memory_operand" "m,m"))))] "TARGET_AVX512F && <sd_mask_mode512bit_condition>" @@ -3763,8 +3763,8 @@ (fma:VF_AVX512 (vec_duplicate:VF_AVX512 (match_operand:<ssescalarmode> 1 "memory_operand" "m,m")) - (match_operand:VF_AVX512 2 "nonimmediate_operand" "0,v") - (match_operand:VF_AVX512 3 "nonimmediate_operand" "v,0")))] + (match_operand:VF_AVX512 2 "register_operand" "0,v") + (match_operand:VF_AVX512 3 "register_operand" "v,0")))] "TARGET_AVX512F && <sd_mask_mode512bit_condition>" "@ vfmadd132<ssemodesuffix>\t{%1<avx512bcst>, %3, %0<sd_mask_op4>|%0<sd_mask_op4>, %3, %1<avx512bcst>} @@ -3775,10 +3775,10 @@ (define_insn "*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_3" [(set (match_operand:VF_AVX512 0 "register_operand" "=v,v") (fma:VF_AVX512 - (match_operand:VF_AVX512 1 "nonimmediate_operand" "0,v") + (match_operand:VF_AVX512 1 "register_operand" "0,v") (vec_duplicate:VF_AVX512 (match_operand:<ssescalarmode> 2 "memory_operand" "m,m")) - (match_operand:VF_AVX512 3 "nonimmediate_operand" "v,0")))] + (match_operand:VF_AVX512 3 "register_operand" "v,0")))] "TARGET_AVX512F && <sd_mask_mode512bit_condition>" "@ vfmadd132<ssemodesuffix>\t{%2<avx512bcst>, %3, %0<sd_mask_op4>|%0<sd_mask_op4>, %3, %2<avx512bcst>} |