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author | Jackson Woodruff <jackson.woodruff@arm.com> | 2018-08-02 10:39:23 +0000 |
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committer | Jackson Woodruff <jcw@gcc.gnu.org> | 2018-08-02 10:39:23 +0000 |
commit | 363b395bad6e45bb5d6e4924ff4f49400653f011 (patch) | |
tree | dc6012ac1091127243d86548e32f1e4abee0854f /gcc | |
parent | ca498a11887e4d6b6a635db3e7df8b93804a4478 (diff) | |
download | gcc-363b395bad6e45bb5d6e4924ff4f49400653f011.zip gcc-363b395bad6e45bb5d6e4924ff4f49400653f011.tar.gz gcc-363b395bad6e45bb5d6e4924ff4f49400653f011.tar.bz2 |
re PR target/86014 ([AArch64] missed LDP optimization)
gcc/
2018-08-02 Jackson Woodruff <jackson.woodruff@arm.com>
PR target/86014
* config/aarch64/aarch64.c (aarch64_operands_adjust_ok_for_ldpstp):
No longer check last store for clobber of address register.
gcc/testsuite
2018-08-02 Jackson Woodruff <jackson.woodruff@arm.com>
PR target/86014
* gcc.target/aarch64/ldp_stp_13.c: New test.
From-SVN: r263249
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 6 | ||||
-rw-r--r-- | gcc/config/aarch64/aarch64.c | 39 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/ldp_stp_13.c | 18 |
4 files changed, 49 insertions, 19 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d0eaa6e..5a5b757 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2018-08-02 Jackson Woodruff <jackson.woodruff@arm.com> + + PR target/86014 + * config/aarch64/aarch64.c (aarch64_operands_adjust_ok_for_ldpstp): + No longer check last store for clobber of address register. + 2018-08-02 Martin Liska <mliska@suse.cz> PR gcov-profile/86817 diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index f743f57..014f9f6 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -17270,9 +17270,26 @@ aarch64_operands_adjust_ok_for_ldpstp (rtx *operands, bool load, return false; } - /* Check if addresses are clobbered by load. */ - if (load) - for (int i = 0; i < num_insns; i++) + /* Check if the registers are of same class. */ + rclass = REG_P (reg[0]) && FP_REGNUM_P (REGNO (reg[0])) + ? FP_REGS : GENERAL_REGS; + + for (int i = 1; i < num_insns; i++) + if (REG_P (reg[i]) && FP_REGNUM_P (REGNO (reg[i]))) + { + if (rclass != FP_REGS) + return false; + } + else + { + if (rclass != GENERAL_REGS) + return false; + } + + /* Only the last register in the order in which they occur + may be clobbered by the load. */ + if (rclass == GENERAL_REGS && load) + for (int i = 0; i < num_insns - 1; i++) if (reg_mentioned_p (reg[i], mem[i])) return false; @@ -17312,22 +17329,6 @@ aarch64_operands_adjust_ok_for_ldpstp (rtx *operands, bool load, && MEM_ALIGN (mem[0]) < 8 * BITS_PER_UNIT) return false; - /* Check if the registers are of same class. */ - rclass = REG_P (reg[0]) && FP_REGNUM_P (REGNO (reg[0])) - ? FP_REGS : GENERAL_REGS; - - for (int i = 1; i < num_insns; i++) - if (REG_P (reg[i]) && FP_REGNUM_P (REGNO (reg[i]))) - { - if (rclass != FP_REGS) - return false; - } - else - { - if (rclass != GENERAL_REGS) - return false; - } - return true; } diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index a8da2ab..0b5eba7 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2018-08-02 Jackson Woodruff <jackson.woodruff@arm.com> + + PR target/86014 + * gcc.target/aarch64/ldp_stp_13.c: New test. + 2018-08-02 Thomas Preud'homme <thomas.preudhomme@linaro.org> PR target/85434 diff --git a/gcc/testsuite/gcc.target/aarch64/ldp_stp_13.c b/gcc/testsuite/gcc.target/aarch64/ldp_stp_13.c new file mode 100644 index 0000000..9cc3942 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/ldp_stp_13.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mabi=ilp32" } */ + +long long +load_long (long long int *arr) +{ + return arr[400] << 1 + arr[401] << 1 + arr[403] << 1 + arr[404] << 1; +} + +/* { dg-final { scan-assembler-times "ldp\tx\[0-9\]+, x\[0-9\]+, " 2 } } */ + +int +load (int *arr) +{ + return arr[527] << 1 + arr[400] << 1 + arr[401] << 1 + arr[528] << 1; +} + +/* { dg-final { scan-assembler-times "ldp\tw\[0-9\]+, w\[0-9\]+, " 2 } } */ |