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authorRichard Sandiford <richard.sandiford@arm.com>2020-08-05 14:49:32 +0100
committerRichard Sandiford <richard.sandiford@arm.com>2020-08-05 14:49:31 +0100
commit2c272091c09298eea02b6bb3b3ffd95db9ea505b (patch)
tree8cf28e742d8fe0384d2d5d9952cb61f0886327df /gcc
parent6aec53ee4f75a64cc9c35577e8d785ba2b692270 (diff)
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aarch64: Add missing %z prefixes to LDP/STP patterns
For LDP/STP Q, the memory operand might not be valid for "m", so we need to use %z<N> instead of %<N> in the asm template. This patch does that for all Ump LDP/STP patterns, regardless of whether it's strictly needed. This is needed to unbreak bootstrap. 2020-08-05 Richard Sandiford <richard.sandiford@arm.com> gcc/ * config/aarch64/aarch64.md (load_pair_sw_<SX:mode><SX2:mode>) (load_pair_dw_<DX:mode><DX2:mode>, load_pair_dw_tftf) (store_pair_sw_<SX:mode><SX2:mode>) (store_pair_dw_<DX:mode><DX2:mode>, store_pair_dw_tftf) (*load_pair_extendsidi2_aarch64) (*load_pair_zero_extendsidi2_aarch64): Use %z for the memory operand. * config/aarch64/aarch64-simd.md (load_pair<DREG:mode><DREG2:mode>) (vec_store_pair<DREG:mode><DREG2:mode>, load_pair<VQ:mode><VQ2:mode>) (vec_store_pair<VQ:mode><VQ2:mode>): Likewise.
Diffstat (limited to 'gcc')
-rw-r--r--gcc/config/aarch64/aarch64-simd.md8
-rw-r--r--gcc/config/aarch64/aarch64.md26
2 files changed, 17 insertions, 17 deletions
diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md
index 11ebf5b9..381a702 100644
--- a/gcc/config/aarch64/aarch64-simd.md
+++ b/gcc/config/aarch64/aarch64-simd.md
@@ -187,7 +187,7 @@
plus_constant (Pmode,
XEXP (operands[1], 0),
GET_MODE_SIZE (<DREG:MODE>mode)))"
- "ldp\\t%d0, %d2, %1"
+ "ldp\\t%d0, %d2, %z1"
[(set_attr "type" "neon_ldp")]
)
@@ -201,7 +201,7 @@
plus_constant (Pmode,
XEXP (operands[0], 0),
GET_MODE_SIZE (<DREG:MODE>mode)))"
- "stp\\t%d1, %d3, %0"
+ "stp\\t%d1, %d3, %z0"
[(set_attr "type" "neon_stp")]
)
@@ -215,7 +215,7 @@
plus_constant (Pmode,
XEXP (operands[1], 0),
GET_MODE_SIZE (<VQ:MODE>mode)))"
- "ldp\\t%q0, %q2, %1"
+ "ldp\\t%q0, %q2, %z1"
[(set_attr "type" "neon_ldp_q")]
)
@@ -228,7 +228,7 @@
plus_constant (Pmode,
XEXP (operands[0], 0),
GET_MODE_SIZE (<VQ:MODE>mode)))"
- "stp\\t%q1, %q3, %0"
+ "stp\\t%q1, %q3, %z0"
[(set_attr "type" "neon_stp_q")]
)
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index df780b8..25d7725 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -1574,8 +1574,8 @@
XEXP (operands[1], 0),
GET_MODE_SIZE (<SX:MODE>mode)))"
"@
- ldp\\t%w0, %w2, %1
- ldp\\t%s0, %s2, %1"
+ ldp\\t%w0, %w2, %z1
+ ldp\\t%s0, %s2, %z1"
[(set_attr "type" "load_8,neon_load1_2reg")
(set_attr "arch" "*,fp")]
)
@@ -1591,8 +1591,8 @@
XEXP (operands[1], 0),
GET_MODE_SIZE (<DX:MODE>mode)))"
"@
- ldp\\t%x0, %x2, %1
- ldp\\t%d0, %d2, %1"
+ ldp\\t%x0, %x2, %z1
+ ldp\\t%d0, %d2, %z1"
[(set_attr "type" "load_16,neon_load1_2reg")
(set_attr "arch" "*,fp")]
)
@@ -1607,7 +1607,7 @@
plus_constant (Pmode,
XEXP (operands[1], 0),
GET_MODE_SIZE (TFmode)))"
- "ldp\\t%q0, %q2, %1"
+ "ldp\\t%q0, %q2, %z1"
[(set_attr "type" "neon_ldp_q")
(set_attr "fp" "yes")]
)
@@ -1624,8 +1624,8 @@
XEXP (operands[0], 0),
GET_MODE_SIZE (<SX:MODE>mode)))"
"@
- stp\\t%w1, %w3, %0
- stp\\t%s1, %s3, %0"
+ stp\\t%w1, %w3, %z0
+ stp\\t%s1, %s3, %z0"
[(set_attr "type" "store_8,neon_store1_2reg")
(set_attr "arch" "*,fp")]
)
@@ -1641,8 +1641,8 @@
XEXP (operands[0], 0),
GET_MODE_SIZE (<DX:MODE>mode)))"
"@
- stp\\t%x1, %x3, %0
- stp\\t%d1, %d3, %0"
+ stp\\t%x1, %x3, %z0
+ stp\\t%d1, %d3, %z0"
[(set_attr "type" "store_16,neon_store1_2reg")
(set_attr "arch" "*,fp")]
)
@@ -1657,7 +1657,7 @@
plus_constant (Pmode,
XEXP (operands[0], 0),
GET_MODE_SIZE (TFmode)))"
- "stp\\t%q1, %q3, %0"
+ "stp\\t%q1, %q3, %z0"
[(set_attr "type" "neon_stp_q")
(set_attr "fp" "yes")]
)
@@ -1790,7 +1790,7 @@
plus_constant (Pmode,
XEXP (operands[1], 0),
GET_MODE_SIZE (SImode)))"
- "ldpsw\\t%0, %2, %1"
+ "ldpsw\\t%0, %2, %z1"
[(set_attr "type" "load_8")]
)
@@ -1819,8 +1819,8 @@
XEXP (operands[1], 0),
GET_MODE_SIZE (SImode)))"
"@
- ldp\t%w0, %w2, %1
- ldp\t%s0, %s2, %1"
+ ldp\t%w0, %w2, %z1
+ ldp\t%s0, %s2, %z1"
[(set_attr "type" "load_8,neon_load1_2reg")
(set_attr "arch" "*,fp")]
)