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author | Alexandre Oliva <oliva@adacore.com> | 2025-01-10 09:32:20 -0300 |
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committer | Alexandre Oliva <oliva@gnu.org> | 2025-01-10 09:32:20 -0300 |
commit | 261ffe685f3865ea61599d61d6b32b92e476a342 (patch) | |
tree | 0c11f3faf31de267dd0e0a0f426bbde6bca09b96 /gcc | |
parent | 38401c58f4aae31fd29a16607e9018cb1f66c3ed (diff) | |
download | gcc-261ffe685f3865ea61599d61d6b32b92e476a342.zip gcc-261ffe685f3865ea61599d61d6b32b92e476a342.tar.gz gcc-261ffe685f3865ea61599d61d6b32b92e476a342.tar.bz2 |
testsuite: generalize ifcombine field-merge tests [PR118025]
A number of tests that check for specific ifcombine transformations
fail on AVR and PRU targets, whose type sizes and alignments aren't
conducive of the expected transformations. Adjust the expectations.
Most execution tests should run successfully regardless of the
transformations, but a few that could conceivably fail if short and
char have the same bit width now check for that and bypass the tests
that would fail.
Conversely, one test that had such a runtime test, but that would work
regardless, no longer has that runtime test, and its types are
narrowed so that the transformations on 32-bit targets are more likely
to be the same as those that used to take place on 64-bit targets.
This latter change is somewhat obviated by a separate patch, but I've
left it in place anyway.
for gcc/testsuite/ChangeLog
PR testsuite/118025
* gcc.dg/field-merge-1.c: Skip BIT_FIELD_REF counting on AVR and PRU.
* gcc.dg/field-merge-3.c: Bypass the test if short doesn't have the
expected size.
* gcc.dg/field-merge-8.c: Likewise.
* gcc.dg/field-merge-9.c: Likewise. Skip optimization counting on
AVR and PRU.
* gcc.dg/field-merge-13.c: Skip optimization counting on AVR and PRU.
* gcc.dg/field-merge-15.c: Likewise.
* gcc.dg/field-merge-17.c: Likewise.
* gcc.dg/field-merge-16.c: Likewise. Drop runtime bypass. Use
smaller types.
* gcc.dg/field-merge-14.c: Add comments.
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/testsuite/gcc.dg/field-merge-1.c | 2 | ||||
-rw-r--r-- | gcc/testsuite/gcc.dg/field-merge-13.c | 2 | ||||
-rw-r--r-- | gcc/testsuite/gcc.dg/field-merge-14.c | 3 | ||||
-rw-r--r-- | gcc/testsuite/gcc.dg/field-merge-15.c | 2 | ||||
-rw-r--r-- | gcc/testsuite/gcc.dg/field-merge-16.c | 17 | ||||
-rw-r--r-- | gcc/testsuite/gcc.dg/field-merge-17.c | 2 | ||||
-rw-r--r-- | gcc/testsuite/gcc.dg/field-merge-3.c | 2 | ||||
-rw-r--r-- | gcc/testsuite/gcc.dg/field-merge-8.c | 2 | ||||
-rw-r--r-- | gcc/testsuite/gcc.dg/field-merge-9.c | 4 |
9 files changed, 20 insertions, 16 deletions
diff --git a/gcc/testsuite/gcc.dg/field-merge-1.c b/gcc/testsuite/gcc.dg/field-merge-1.c index 1818e10..4405d40 100644 --- a/gcc/testsuite/gcc.dg/field-merge-1.c +++ b/gcc/testsuite/gcc.dg/field-merge-1.c @@ -58,7 +58,7 @@ int main () { return 0; } -/* { dg-final { scan-tree-dump-times "BIT_FIELD_REF" 8 "optimized" } } */ +/* { dg-final { scan-tree-dump-times "BIT_FIELD_REF" 8 "optimized" { target { ! { avr-*-* pru-*-* } } } } } */ /* { dg-final { scan-assembler-not "cmpb" { target { i*86-*-* || x86_64-*-* } } } } */ /* { dg-final { scan-assembler-times "cmpl" 8 { target { i*86-*-* || x86_64-*-* } } } } */ /* { dg-final { scan-assembler-times "cmpw" 8 { target { powerpc*-*-* || rs6000-*-* } } } } */ diff --git a/gcc/testsuite/gcc.dg/field-merge-13.c b/gcc/testsuite/gcc.dg/field-merge-13.c index 7e4f4c4..eeef733 100644 --- a/gcc/testsuite/gcc.dg/field-merge-13.c +++ b/gcc/testsuite/gcc.dg/field-merge-13.c @@ -90,4 +90,4 @@ int main () { return 0; } -/* { dg-final { scan-tree-dump-times "optimizing" 9 "ifcombine" } } */ +/* { dg-final { scan-tree-dump-times "optimizing" 9 "ifcombine" { target { ! { avr-*-* pru-*-* } } } } } */ diff --git a/gcc/testsuite/gcc.dg/field-merge-14.c b/gcc/testsuite/gcc.dg/field-merge-14.c index 91d84cf..73259e0 100644 --- a/gcc/testsuite/gcc.dg/field-merge-14.c +++ b/gcc/testsuite/gcc.dg/field-merge-14.c @@ -1,7 +1,8 @@ /* { dg-do run } */ /* { dg-options "-O -fdump-tree-ifcombine-details" } */ -/* Check that we don't get confused by multiple conversions. */ +/* Check that we don't get confused by multiple conversions. Conceivably, we + could combine both tests using b, but the current logic won't do that. */ __attribute__((noipa)) int f(int *a,int *d) diff --git a/gcc/testsuite/gcc.dg/field-merge-15.c b/gcc/testsuite/gcc.dg/field-merge-15.c index 34641e8..fc38464 100644 --- a/gcc/testsuite/gcc.dg/field-merge-15.c +++ b/gcc/testsuite/gcc.dg/field-merge-15.c @@ -33,4 +33,4 @@ int main () { return 0; } -/* { dg-final { scan-tree-dump-times "optimizing" 6 "ifcombine" } } */ +/* { dg-final { scan-tree-dump-times "optimizing" 6 "ifcombine" { target { ! { avr-*-* pru-*-* } } } } } */ diff --git a/gcc/testsuite/gcc.dg/field-merge-16.c b/gcc/testsuite/gcc.dg/field-merge-16.c index 2ca23ea..afdaf45 100644 --- a/gcc/testsuite/gcc.dg/field-merge-16.c +++ b/gcc/testsuite/gcc.dg/field-merge-16.c @@ -4,17 +4,17 @@ /* Check that tests for sign-extension bits are handled correctly. */ struct s { - short a; - short b; - unsigned short c; - unsigned short d; -} __attribute__ ((aligned (8))); + signed char a; + signed char b; + unsigned char c; + unsigned char d; +} __attribute__ ((aligned (4))); struct s p = { -1, 0, 0, 0 }; struct s q = { 0, -1, 0, 0 }; struct s r = { 1, 1, 0, 0 }; -const long long mask = 1ll << (sizeof (long long) * __CHAR_BIT__ - 5); +const long mask = 1l << (sizeof (long) * __CHAR_BIT__ - 5); int fp () { @@ -50,9 +50,6 @@ int fr () } int main () { - /* Unlikely, but play safe. */ - if (sizeof (long long) == sizeof (short)) - return 0; if (fp () < 0 || fq () < 0 || fr () > 0) @@ -63,4 +60,4 @@ int main () { /* We test .b after other fields instead of right after .a to give field merging a chance, otherwise the masked compares with zero are combined by other ifcombine logic. The .c test is discarded by earlier optimizers. */ -/* { dg-final { scan-tree-dump-times "optimizing" 6 "ifcombine" } } */ +/* { dg-final { scan-tree-dump-times "optimizing" 6 "ifcombine" { target { ! { avr-*-* pru-*-* } } } } } */ diff --git a/gcc/testsuite/gcc.dg/field-merge-17.c b/gcc/testsuite/gcc.dg/field-merge-17.c index 06c8ec1..a42658a 100644 --- a/gcc/testsuite/gcc.dg/field-merge-17.c +++ b/gcc/testsuite/gcc.dg/field-merge-17.c @@ -43,4 +43,4 @@ int main () { return 0; } -/* { dg-final { scan-tree-dump-times "optimizing" 4 "ifcombine" } } */ +/* { dg-final { scan-tree-dump-times "optimizing" 4 "ifcombine" { target { ! { avr-*-* pru-*-* } } } } } */ diff --git a/gcc/testsuite/gcc.dg/field-merge-3.c b/gcc/testsuite/gcc.dg/field-merge-3.c index f26e8a9..a9fe404 100644 --- a/gcc/testsuite/gcc.dg/field-merge-3.c +++ b/gcc/testsuite/gcc.dg/field-merge-3.c @@ -31,6 +31,8 @@ void f (void) { } int main () { + if (sizeof (short) != 2) + return 0; f (); return 0; } diff --git a/gcc/testsuite/gcc.dg/field-merge-8.c b/gcc/testsuite/gcc.dg/field-merge-8.c index ae270e1..7d49c27 100644 --- a/gcc/testsuite/gcc.dg/field-merge-8.c +++ b/gcc/testsuite/gcc.dg/field-merge-8.c @@ -20,6 +20,8 @@ void f (void) { } int main () { + if (sizeof (short) != 2) + return 0; f (); return 0; } diff --git a/gcc/testsuite/gcc.dg/field-merge-9.c b/gcc/testsuite/gcc.dg/field-merge-9.c index 04df54c..49ef598 100644 --- a/gcc/testsuite/gcc.dg/field-merge-9.c +++ b/gcc/testsuite/gcc.dg/field-merge-9.c @@ -29,8 +29,10 @@ void f (void) { } int main () { + if (sizeof (short) != 2) + return 0; f (); return 0; } -/* { dg-final { scan-tree-dump-times "optimizing two comparisons" 2 "ifcombine" } } */ +/* { dg-final { scan-tree-dump-times "optimizing two comparisons" 2 "ifcombine" { target { ! { avr-*-* pru-*-* } } } } } */ |