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authorChung-Ju Wu <jasonwucj@gmail.com>2018-03-18 04:47:10 +0000
committerChung-Ju Wu <jasonwucj@gcc.gnu.org>2018-03-18 04:47:10 +0000
commit24a711668bf5ecdd6b277333d2ab5ef10189f307 (patch)
treea73db68de7dc2e5c0b5979965de3b34b521f9bca /gcc
parent369c3be428fe7578d4274b2ba2874ab79db09e9b (diff)
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[NDS32] Define CLZ_DEFINED_VALUE_AT_ZERO.
gcc/ * config/nds32/nds32.h (CLZ_DEFINED_VALUE_AT_ZERO): Define. From-SVN: r258627
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog4
-rw-r--r--gcc/config/nds32/nds32.h5
2 files changed, 9 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a1186fc..224e8ca 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2018-03-18 Chung-Ju Wu <jasonwucj@gmail.com>
+
+ * config/nds32/nds32.h (CLZ_DEFINED_VALUE_AT_ZERO): Define.
+
2018-03-17 Chung-Ju Wu <jasonwucj@gmail.com>
Kito Cheng <kito.cheng@gmail.com>
diff --git a/gcc/config/nds32/nds32.h b/gcc/config/nds32/nds32.h
index 749a552..b350a0c 100644
--- a/gcc/config/nds32/nds32.h
+++ b/gcc/config/nds32/nds32.h
@@ -1066,6 +1066,11 @@ enum reg_class
when the condition is true. */
#define STORE_FLAG_VALUE 1
+/* A C expression that indicates whether the architecture defines a value for
+ clz or ctz with a zero operand. In nds32 clz for 0 result 32 is defined
+ in ISA spec */
+#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 32, 1)
+
/* An alias for the machine mode for pointers. */
#define Pmode SImode