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author | Janis Johnson <janis@gcc.gnu.org> | 2001-12-04 00:47:14 +0000 |
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committer | Janis Johnson <janis@gcc.gnu.org> | 2001-12-04 00:47:14 +0000 |
commit | 21b8482ae8289fccb3ddaaa74532995aa3f27c56 (patch) | |
tree | 75d518e5186a2da27e1bd86593dcab821b360f44 /gcc | |
parent | 44eca121fcf46c61cc2dd36bccb3bd5235b30006 (diff) | |
download | gcc-21b8482ae8289fccb3ddaaa74532995aa3f27c56.zip gcc-21b8482ae8289fccb3ddaaa74532995aa3f27c56.tar.gz gcc-21b8482ae8289fccb3ddaaa74532995aa3f27c56.tar.bz2 |
rtl.def (PREFETCH): New rtx code.
* rtl.def (PREFETCH): New rtx code.
* doc/rtl.texi (PREFETCH): Add documentation.
* function.c (instantiate_virtual_regs_1): Handle PREFETCH rtx.
* rtlanal.c (reg_referenced_p): Ditto.
* sched-vis.c (print_exp): Ditto.
* ssa-dce.c (find_inherently_necessary): Ditto.
From-SVN: r47580
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/doc/rtl.texi | 14 | ||||
-rw-r--r-- | gcc/function.c | 1 | ||||
-rw-r--r-- | gcc/rtl.def | 11 | ||||
-rw-r--r-- | gcc/rtlanal.c | 7 | ||||
-rw-r--r-- | gcc/sched-vis.c | 6 | ||||
-rw-r--r-- | gcc/ssa-dce.c | 1 |
6 files changed, 40 insertions, 0 deletions
diff --git a/gcc/doc/rtl.texi b/gcc/doc/rtl.texi index 8184894..c0c2cda 100644 --- a/gcc/doc/rtl.texi +++ b/gcc/doc/rtl.texi @@ -2326,6 +2326,20 @@ are set up by branch shortening and hold a label with a minimum and a maximum address, respectively. @var{flags} indicates the relative position of @var{base}, @var{min} and @var{max} to the containing insn and of @var{min} and @var{max} to @var{base}. See rtl.def for details. + +@findex prefetch +@item (prefetch:@var{m} @var{addr} @var{rw} @var{locality}) +Represents prefetch of memory at address @var{addr}. +Operand @var{rw} is 1 if the prefetch is for data to be written, 0 otherwise; +targets that do not support write prefetches should treat this as a normal +prefetch. +Operand @var{locality} specifies the amount of temporal locality; 0 if there +is none or 1, 2, or 3 for increasing levels of temporal locality; +targets that do not support locality hints should ignore this. + +This insn is used to minimize cache-miss latency by moving data into a +cache before it is accessed. It should use only non-faulting data prefetch +instructions. @end table @node Incdec diff --git a/gcc/function.c b/gcc/function.c index 0891dd0..04f8ca6 100644 --- a/gcc/function.c +++ b/gcc/function.c @@ -3979,6 +3979,7 @@ instantiate_virtual_regs_1 (loc, object, extra_insns) } /* Fall through to generic unary operation case. */ + case PREFETCH: case SUBREG: case STRICT_LOW_PART: case NEG: case NOT: diff --git a/gcc/rtl.def b/gcc/rtl.def index 6c887bc..786b940 100644 --- a/gcc/rtl.def +++ b/gcc/rtl.def @@ -514,6 +514,17 @@ DEF_RTL_EXPR(ADDR_VEC, "addr_vec", "E", 'x') DEF_RTL_EXPR(ADDR_DIFF_VEC, "addr_diff_vec", "eEee0", 'x') +/* Memory prefetch, with attributes supported on some targets. + Operand 1 is the address of the memory to fetch. + Operand 2 is 1 for a write access, 0 otherwise. + Operand 3 is the level of temporal locality; 0 means there is no + temporal locality and 1, 2, and 3 are for increasing levels of temporal + locality. + + The attributes specified by operands 2 and 3 are ignored for targets + whose prefetch instructions do not support them. */ +DEF_RTL_EXPR(PREFETCH, "prefetch", "eee", 'x') + /* ---------------------------------------------------------------------- At the top level of an instruction (perhaps under PARALLEL). ---------------------------------------------------------------------- */ diff --git a/gcc/rtlanal.c b/gcc/rtlanal.c index eb79fe9..07c4676 100644 --- a/gcc/rtlanal.c +++ b/gcc/rtlanal.c @@ -569,6 +569,9 @@ reg_referenced_p (x, body) case TRAP_IF: return reg_overlap_mentioned_p (x, TRAP_CONDITION (body)); + case PREFETCH: + return reg_overlap_mentioned_p (x, XEXP (body, 0)); + case UNSPEC: case UNSPEC_VOLATILE: for (i = XVECLEN (body, 0) - 1; i >= 0; i--) @@ -1456,6 +1459,10 @@ note_uses (pbody, fun, data) (*fun) (&TRAP_CONDITION (body), data); return; + case PREFETCH: + (*fun) (&XEXP (body, 0), data); + return; + case UNSPEC: case UNSPEC_VOLATILE: for (i = XVECLEN (body, 0) - 1; i >= 0; i--) diff --git a/gcc/sched-vis.c b/gcc/sched-vis.c index 7c1134f..bf7f968 100644 --- a/gcc/sched-vis.c +++ b/gcc/sched-vis.c @@ -474,6 +474,12 @@ print_exp (buf, x, verbose) fun = "trap_if"; op[0] = TRAP_CONDITION (x); break; + case PREFETCH: + fun = "prefetch"; + op[0] = XEXP (x, 0); + op[1] = XEXP (x, 1); + op[2] = XEXP (x, 2); + break; case UNSPEC: case UNSPEC_VOLATILE: { diff --git a/gcc/ssa-dce.c b/gcc/ssa-dce.c index 62e59e8..cd37b2f 100644 --- a/gcc/ssa-dce.c +++ b/gcc/ssa-dce.c @@ -373,6 +373,7 @@ find_inherently_necessary (x) { case CALL_INSN: case BARRIER: + case PREFETCH: return !0; case CODE_LABEL: case NOTE: |