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| author | Uros Bizjak <ubizjak@gmail.com> | 2024-12-20 16:16:15 +0100 |
|---|---|---|
| committer | Uros Bizjak <ubizjak@gmail.com> | 2024-12-20 16:31:58 +0100 |
| commit | 219ddae16f9d724baeff86934f8981aa5ef7b95f (patch) | |
| tree | 857390d74e95f67b38867a7d6c20b2a40dfaf30f /gcc | |
| parent | 89b2c7dc96c4944c306131b665a4738a8a99413e (diff) | |
| download | gcc-219ddae16f9d724baeff86934f8981aa5ef7b95f.zip gcc-219ddae16f9d724baeff86934f8981aa5ef7b95f.tar.gz gcc-219ddae16f9d724baeff86934f8981aa5ef7b95f.tar.bz2 | |
i386: Disable SImode/DImode moves from/to mask regs without avx512bw [PR118067]
SImode and DImode moves from/to mask registers are valid only with AVX512BW,
so mark relevant alternatives in *movsi_internal and *movdi_internal as such.
Even with the patch, the testcase still fails, but now with:
pr118067.c: In function ‘foo’:
pr118067.c:13:1: internal compiler error: maximum number of generated reload insns per insn achieved (90)
13 | }
| ^
0x2c3b581 internal_error(char const*, ...)
../../git/gcc/gcc/diagnostic-global-context.cc:517
0xb68938 lra_constraints(bool)
../../git/gcc/gcc/lra-constraints.cc:5411
0xb51a0d lra(_IO_FILE*, int)
../../git/gcc/gcc/lra.cc:2449
0xaf9f4d do_reload
../../git/gcc/gcc/ira.cc:5977
0xafa462 execute
../../git/gcc/gcc/ira.cc:6165
PR target/118067
gcc/ChangeLog:
* config/i386/i386.md (*movdi_internal):
Disable alternatives from/to mask registers without AVX512BW.
(*movsi_internal): Ditto.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/i386/i386.md | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 6edcb6d..9f26cc2 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -2580,7 +2580,7 @@ [(set (match_operand:DI 0 "nonimmediate_operand" "=r ,o ,r,r ,r,m ,*y,*y,?*y,?m,?r,?*y,?Yv,?v,?v,m ,m,?jc,?*Yd,?r,?v,?*y,?*x,*k,*k ,*r,*m,*k") (match_operand:DI 1 "general_operand" - "riFo,riF,Z,rem,i,re,C ,*y,Bk ,*y,*y,r ,C ,?v,Bk,?v,v,*Yd,jc ,?v,r ,*x ,*y ,*r,*kBk,*k,*k,CBC"))] + "riFo,riF,Z,rem,i,re,C ,*y,Bk ,*y,*y,r ,C ,?v,Bk,?v,v,*Yd,jc ,?v,r ,*x ,*y ,*r,*kBk,*k,*k,CBC"))] "!(MEM_P (operands[0]) && MEM_P (operands[1])) && ix86_hardreg_mov_ok (operands[0], operands[1])" { @@ -2642,12 +2642,16 @@ [(set (attr "isa") (cond [(eq_attr "alternative" "0,1,17,18") (const_string "nox64") - (eq_attr "alternative" "2,3,4,5,10,11,23,25") + (eq_attr "alternative" "2,3,4,5,10,11") (const_string "x64") (eq_attr "alternative" "19,20") (const_string "x64_sse2") + (eq_attr "alternative" "23,25") + (const_string "x64_avx512bw") (eq_attr "alternative" "21,22") (const_string "sse2") + (eq_attr "alternative" "24,26,27") + (const_string "avx512bw") ] (const_string "*"))) (set (attr "type") @@ -2816,7 +2820,7 @@ [(set (match_operand:SI 0 "nonimmediate_operand" "=r,m ,*y,*y,?*y,?m,?r,?*y,?Yv,?v,?v,m ,?r,?v,*k,*k ,*rm,*k") (match_operand:SI 1 "general_operand" - "g ,re,C ,*y,Bk ,*y,*y,r ,C ,?v,Bk,?v,?v,r ,*r,*kBk,*k ,CBC"))] + "g ,re,C ,*y,Bk ,*y,*y,r ,C ,?v,Bk,?v,?v,r ,*r,*kBk,*k ,CBC"))] "!(MEM_P (operands[0]) && MEM_P (operands[1])) && ix86_hardreg_mov_ok (operands[0], operands[1])" { @@ -2870,6 +2874,8 @@ [(set (attr "isa") (cond [(eq_attr "alternative" "12,13") (const_string "sse2") + (eq_attr "alternative" "14,15,16,17") + (const_string "avx512bw") ] (const_string "*"))) (set (attr "type") |