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| author | Michael Collison <michael.collison@arm.com> | 2017-07-11 00:17:02 +0000 |
|---|---|---|
| committer | Michael Collison <collison@gcc.gnu.org> | 2017-07-11 00:17:02 +0000 |
| commit | 214f700a8bd18c37fc4a5390ccdee164d22443e2 (patch) | |
| tree | eb71e584ce0f23f627231f13907b93dab34d8715 /gcc | |
| parent | 6636b6ff9aa33d99ab0639ef8e532c114b6776b4 (diff) | |
| download | gcc-214f700a8bd18c37fc4a5390ccdee164d22443e2.zip gcc-214f700a8bd18c37fc4a5390ccdee164d22443e2.tar.gz gcc-214f700a8bd18c37fc4a5390ccdee164d22443e2.tar.bz2 | |
var_shift_mask_1.c: Fix for ILP32
2017-07-10 Michael Collison <michael.collison@arm.com>
* gcc.target/aarch64/var_shift_mask_1.c: Fix for ILP32
From-SVN: r250112
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/testsuite/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/aarch64/var_shift_mask_1.c | 30 |
2 files changed, 21 insertions, 13 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index f6dec47..153da28 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2017-07-10 Michael Collison <michael.collison@arm.com> + + * gcc.target/aarch64/var_shift_mask_1.c: Fix for ILP32 + 2017-07-10 Uros Bizjak <ubizjak@gmail.com> PR target/81375 diff --git a/gcc/testsuite/gcc.target/aarch64/var_shift_mask_1.c b/gcc/testsuite/gcc.target/aarch64/var_shift_mask_1.c index e2b020e..0bd326a 100644 --- a/gcc/testsuite/gcc.target/aarch64/var_shift_mask_1.c +++ b/gcc/testsuite/gcc.target/aarch64/var_shift_mask_1.c @@ -11,17 +11,17 @@ f1 (unsigned x, int y) return x << (y & 31); } -unsigned long -f2 (unsigned long x, int y) +unsigned long long +f2 (unsigned long long x, int y) { return x << (y & 63); } -unsigned long -f3 (unsigned long bit_addr, int y) +unsigned long long +f3 (unsigned long long bit_addr, int y) { unsigned long bitnumb = bit_addr & 63; - return (1L << bitnumb); + return (1LL << bitnumb); } unsigned int @@ -31,28 +31,32 @@ f4 (unsigned int x, unsigned int y) return x >> y | (x << (32 - y)); } -unsigned long -f5 (unsigned long x, unsigned long y) +unsigned long long +f5 (unsigned long long x, unsigned long long y) { y &= 63; return x >> y | (x << (64 - y)); } -unsigned long -f6 (unsigned long x, unsigned long y) +unsigned int +f6 (unsigned int x, unsigned int y) { + return (x << (32 - (y & 31))); +} +unsigned long long +f7 (unsigned long long x, unsigned long long y) +{ return (x << (64 - (y & 63))); - } -unsigned long -f7 (unsigned long x, unsigned long y) +unsigned long long +f8 (unsigned long long x, unsigned long long y) { return (x << -(y & 63)); } -/* { dg-final { scan-assembler-times "lsl\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "lsl\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+" 2 } } */ /* { dg-final { scan-assembler-times "lsl\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+" 4 } } */ /* { dg-final { scan-assembler-times "ror\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+" 1 } } */ /* { dg-final { scan-assembler-times "ror\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+" 1 } } */ |