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authorH.J. Lu <hongjiu.lu@intel.com>2012-03-28 22:42:28 +0000
committerH.J. Lu <hjl@gcc.gnu.org>2012-03-28 15:42:28 -0700
commit1ab8b791c88ee57fe840ea28c03d65ddfc3aa882 (patch)
tree84c619a9a3c6d7013addd57ed7d910c8934a1e19 /gcc
parent2e540b505941a63f422d865c2a1490193e459d38 (diff)
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Add ABI_64 and replace ISA_X32 with ABI_X32
2012-03-28 H.J. Lu <hongjiu.lu@intel.com> * config/i386/biarch64.h (TARGET_64BIT_DEFAULT): Add OPTION_MASK_ABI_64. * config/i386/gnu-user64.h (SPEC_64): Support TARGET_BI_ARCH == 2. (SPEC_X32): Likewise. (MULTILIB_DEFAULTS): Likewise. * config/i386/i386.c (isa_opts): Remove -m64. (ix86_target_string): Properly handle -m32/-m64/-mx32. (ix86_option_override_internal): Properly set OPTION_MASK_ISA_64BIT and OPTION_MASK_ISA_X32 as well as handle -m32, -m64 and -mx32. * config/i386/i386.h (TARGET_X32): Replace OPTION_ISA_X32 with OPTION_ABI_X32. Moved after TARGET_LP64. (TARGET_LP64): Changed to OPTION_ABI_64. * config/i386/i386.opt (m64): Replace ISA_64BIT with ABI_64. (mx32): Replace ISA_X32 with ABI_X32. From-SVN: r185937
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog22
-rw-r--r--gcc/config/i386/biarch64.h2
-rw-r--r--gcc/config/i386/gnu-user64.h9
-rw-r--r--gcc/config/i386/i386.c56
-rw-r--r--gcc/config/i386/i386.h4
-rw-r--r--gcc/config/i386/i386.opt4
6 files changed, 90 insertions, 7 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 55fc1e4..e988df5 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,25 @@
+2012-03-28 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/i386/biarch64.h (TARGET_64BIT_DEFAULT): Add
+ OPTION_MASK_ABI_64.
+
+ * config/i386/gnu-user64.h (SPEC_64): Support TARGET_BI_ARCH == 2.
+ (SPEC_X32): Likewise.
+ (MULTILIB_DEFAULTS): Likewise.
+
+ * config/i386/i386.c (isa_opts): Remove -m64.
+ (ix86_target_string): Properly handle -m32/-m64/-mx32.
+ (ix86_option_override_internal): Properly
+ set OPTION_MASK_ISA_64BIT and OPTION_MASK_ISA_X32 as well as
+ handle -m32, -m64 and -mx32.
+
+ * config/i386/i386.h (TARGET_X32): Replace OPTION_ISA_X32
+ with OPTION_ABI_X32. Moved after TARGET_LP64.
+ (TARGET_LP64): Changed to OPTION_ABI_64.
+
+ * config/i386/i386.opt (m64): Replace ISA_64BIT with ABI_64.
+ (mx32): Replace ISA_X32 with ABI_X32.
+
2012-03-28 Eric Botcazou <ebotcazou@adacore.com>
* tree.c (tree_size) <VECTOR_CST>: New case.
diff --git a/gcc/config/i386/biarch64.h b/gcc/config/i386/biarch64.h
index 629ec98..0c3811e 100644
--- a/gcc/config/i386/biarch64.h
+++ b/gcc/config/i386/biarch64.h
@@ -25,5 +25,5 @@ a copy of the GCC Runtime Library Exception along with this program;
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
<http://www.gnu.org/licenses/>. */
-#define TARGET_64BIT_DEFAULT OPTION_MASK_ISA_64BIT
+#define TARGET_64BIT_DEFAULT (OPTION_MASK_ISA_64BIT | OPTION_MASK_ABI_64)
#define TARGET_BI_ARCH 1
diff --git a/gcc/config/i386/gnu-user64.h b/gcc/config/i386/gnu-user64.h
index 954f3b2..6f7b5de 100644
--- a/gcc/config/i386/gnu-user64.h
+++ b/gcc/config/i386/gnu-user64.h
@@ -58,8 +58,13 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
#if TARGET_64BIT_DEFAULT
#define SPEC_32 "m32"
+#if TARGET_BI_ARCH == 2
+#define SPEC_64 "m64"
+#define SPEC_X32 "m32|m64:;"
+#else
#define SPEC_64 "m32|mx32:;"
#define SPEC_X32 "mx32"
+#endif
#else
#define SPEC_32 "m64|mx32:;"
#define SPEC_64 "m64"
@@ -95,7 +100,11 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
%{shared|pie:crtendS.o%s;:crtend.o%s} crtn.o%s"
#if TARGET_64BIT_DEFAULT
+#if TARGET_BI_ARCH == 2
+#define MULTILIB_DEFAULTS { "mx32" }
+#else
#define MULTILIB_DEFAULTS { "m64" }
+#endif
#else
#define MULTILIB_DEFAULTS { "m32" }
#endif
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 5029be6..42746e4 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -2657,7 +2657,6 @@ ix86_target_string (HOST_WIDE_INT isa, int flags, const char *arch,
preceding options while match those first. */
static struct ix86_target_opts isa_opts[] =
{
- { "-m64", OPTION_MASK_ISA_64BIT },
{ "-mfma4", OPTION_MASK_ISA_FMA4 },
{ "-mfma", OPTION_MASK_ISA_FMA },
{ "-mxop", OPTION_MASK_ISA_XOP },
@@ -2730,6 +2729,7 @@ ix86_target_string (HOST_WIDE_INT isa, int flags, const char *arch,
size_t len;
size_t line_len;
size_t sep_len;
+ const char *abi;
memset (opts, '\0', sizeof (opts));
@@ -2747,6 +2747,21 @@ ix86_target_string (HOST_WIDE_INT isa, int flags, const char *arch,
opts[num++][1] = tune;
}
+ /* Add -m32/-m64/-mx32. */
+ if ((isa & OPTION_MASK_ISA_64BIT) != 0)
+ {
+ if ((isa & OPTION_MASK_ABI_64) != 0)
+ abi = "-m64";
+ else
+ abi = "-mx32";
+ isa &= ~ (OPTION_MASK_ISA_64BIT
+ | OPTION_MASK_ABI_64
+ | OPTION_MASK_ABI_X32);
+ }
+ else
+ abi = "-m32";
+ opts[num++][0] = abi;
+
/* Pick out the options in isa options. */
for (i = 0; i < ARRAY_SIZE (isa_opts); i++)
{
@@ -3102,8 +3117,45 @@ ix86_option_override_internal (bool main_args_p)
SUBSUBTARGET_OVERRIDE_OPTIONS;
#endif
+ /* Turn off both OPTION_MASK_ABI_64 and OPTION_MASK_ABI_X32 if
+ TARGET_64BIT is false. */
+ if (!TARGET_64BIT)
+ ix86_isa_flags &= ~(OPTION_MASK_ABI_64 | OPTION_MASK_ABI_X32);
+#ifdef TARGET_BI_ARCH
+ else
+ {
+#if TARGET_BI_ARCH == 1
+ /* When TARGET_BI_ARCH == 1, by default, OPTION_MASK_ABI_64
+ is on and OPTION_MASK_ABI_X32 is off. We turn off
+ OPTION_MASK_ABI_64 if OPTION_MASK_ABI_X32 is turned on by
+ -mx32. */
+ if (TARGET_X32)
+ ix86_isa_flags &= ~OPTION_MASK_ABI_64;
+#else
+ /* When TARGET_BI_ARCH == 2, by default, OPTION_MASK_ABI_X32 is
+ on and OPTION_MASK_ABI_64 is off. We turn off
+ OPTION_MASK_ABI_X32 if OPTION_MASK_ABI_64 is turned on by
+ -m64. */
+ if (TARGET_LP64)
+ ix86_isa_flags &= ~OPTION_MASK_ABI_X32;
+#endif
+ }
+#endif
+
if (TARGET_X32)
- ix86_isa_flags |= OPTION_MASK_ISA_64BIT;
+ {
+ /* Always turn on OPTION_MASK_ISA_64BIT and turn off
+ OPTION_MASK_ABI_64 for TARGET_X32. */
+ ix86_isa_flags |= OPTION_MASK_ISA_64BIT;
+ ix86_isa_flags &= ~OPTION_MASK_ABI_64;
+ }
+ else if (TARGET_LP64)
+ {
+ /* Always turn on OPTION_MASK_ISA_64BIT and turn off
+ OPTION_MASK_ABI_X32 for TARGET_LP64. */
+ ix86_isa_flags |= OPTION_MASK_ISA_64BIT;
+ ix86_isa_flags &= ~OPTION_MASK_ABI_X32;
+ }
/* -fPIC is the default for x86_64. */
if (TARGET_MACHO && TARGET_64BIT)
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index a53c70a..7ba90c7 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -42,7 +42,6 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
/* Redefines for option macros. */
#define TARGET_64BIT OPTION_ISA_64BIT
-#define TARGET_X32 OPTION_ISA_X32
#define TARGET_MMX OPTION_ISA_MMX
#define TARGET_3DNOW OPTION_ISA_3DNOW
#define TARGET_3DNOW_A OPTION_ISA_3DNOW_A
@@ -77,7 +76,8 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
#define TARGET_F16C OPTION_ISA_F16C
#define TARGET_RTM OPTION_ISA_RTM
-#define TARGET_LP64 (TARGET_64BIT && !TARGET_X32)
+#define TARGET_LP64 OPTION_ABI_64
+#define TARGET_X32 OPTION_ABI_X32
/* SSE4.1 defines round instructions */
#define OPTION_MASK_ISA_ROUND OPTION_MASK_ISA_SSE4_1
diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt
index 965bef6..bf50aed 100644
--- a/gcc/config/i386/i386.opt
+++ b/gcc/config/i386/i386.opt
@@ -425,11 +425,11 @@ Target RejectNegative Negative(m64) Report InverseMask(ISA_64BIT) Var(ix86_isa_f
Generate 32bit i386 code
m64
-Target RejectNegative Negative(mx32) Report Mask(ISA_64BIT) Var(ix86_isa_flags) Save
+Target RejectNegative Negative(mx32) Report Mask(ABI_64) Var(ix86_isa_flags) Save
Generate 64bit x86-64 code
mx32
-Target RejectNegative Negative(m32) Report Mask(ISA_X32) Var(ix86_isa_flags) Save
+Target RejectNegative Negative(m32) Report Mask(ABI_X32) Var(ix86_isa_flags) Save
Generate 32bit x86-64 code
mmmx