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authorRichard Henderson <rth@cygnus.com>1999-07-20 18:15:47 -0700
committerRichard Henderson <rth@gcc.gnu.org>1999-07-20 18:15:47 -0700
commit197043f5390a28c561aaffbee52859279d03bfd4 (patch)
tree56e6b845eb55c0c9c095d807ea1c678349ac5184 /gcc
parent03a6745b8b745131f1ee72141258a67de7d79c5b (diff)
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haifa-sched.c (insn_cost): FREE implies cost 0 and vice versa.
* haifa-sched.c (insn_cost): FREE implies cost 0 and vice versa. (adjust_priority): Always call ADJUST_PRIORITY. (schedule_insn): Only put insns into the ready at cost 0. (schedule_block): Remove redundant initial sort. Give clock_var and can_issue_more to MD_SCHED_REORDER. Requeue if hazard cost is not 0. * tm.texi (MD_SCHED_REORDER): Update docs. * sparc.h (MD_SCHED_REORDER): Update. Set CAN_ISSUE_MORE. * sparc.c (ultra_reorder_called_this_block): Delete. (ultrasparc_sched_init): Don't set it. (ultrasparc_sched_reorder): Don't check it. From-SVN: r28201
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog15
-rw-r--r--gcc/config/sparc/sparc.c11
-rw-r--r--gcc/config/sparc/sparc.h21
-rw-r--r--gcc/haifa-sched.c191
-rw-r--r--gcc/tm.texi8
5 files changed, 124 insertions, 122 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 23fe6ff..17a4ab6 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,18 @@
+Tue Jul 20 18:02:42 1999 Richard Henderson <rth@cygnus.com>
+
+ * haifa-sched.c (insn_cost): FREE implies cost 0 and vice versa.
+ (adjust_priority): Always call ADJUST_PRIORITY.
+ (schedule_insn): Only put insns into the ready at cost 0.
+ (schedule_block): Remove redundant initial sort. Give clock_var
+ and can_issue_more to MD_SCHED_REORDER. Requeue if hazard cost
+ is not 0.
+ * tm.texi (MD_SCHED_REORDER): Update docs.
+
+ * sparc.h (MD_SCHED_REORDER): Update. Set CAN_ISSUE_MORE.
+ * sparc.c (ultra_reorder_called_this_block): Delete.
+ (ultrasparc_sched_init): Don't set it.
+ (ultrasparc_sched_reorder): Don't check it.
+
Tue Jul 20 17:07:54 1999 Richard Henderson <rth@cygnus.com>
* rs6000.h (struct rs6000_args): Add sysv_gregno.
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index c302884..e38d71a 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -6879,8 +6879,6 @@ ultra_flush_pipeline ()
ultra_pipe.free_slot_mask = 0xf;
}
-static int ultra_reorder_called_this_block;
-
/* Init our data structures for this current block. */
void
ultrasparc_sched_init (dump, sched_verbose)
@@ -6890,7 +6888,6 @@ ultrasparc_sched_init (dump, sched_verbose)
bzero ((char *) ultra_pipe_hist, sizeof ultra_pipe_hist);
ultra_cur_hist = 0;
ultra_cycles_elapsed = 0;
- ultra_reorder_called_this_block = 0;
ultra_pipe.free_slot_mask = 0xf;
}
@@ -6980,14 +6977,6 @@ ultrasparc_sched_reorder (dump, sched_verbose, ready, n_ready)
struct ultrasparc_pipeline_state *up = &ultra_pipe;
int i, this_insn;
- /* We get called once unnecessarily per block of insns
- scheduled. */
- if (ultra_reorder_called_this_block == 0)
- {
- ultra_reorder_called_this_block = 1;
- return;
- }
-
if (sched_verbose)
{
int n;
diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h
index ad11d74..f75437b 100644
--- a/gcc/config/sparc/sparc.h
+++ b/gcc/config/sparc/sparc.h
@@ -2702,21 +2702,28 @@ extern int ultrasparc_variable_issue ();
if (sparc_cpu == PROCESSOR_ULTRASPARC) \
ultrasparc_sched_init (DUMP, SCHED_VERBOSE)
-#define MD_SCHED_REORDER(DUMP, SCHED_VERBOSE, READY, N_READY) \
+#define MD_SCHED_REORDER(DUMP, SCHED_VERBOSE, READY, N_READY, CLOCK, CIM) \
+do { \
if (sparc_cpu == PROCESSOR_ULTRASPARC) \
- ultrasparc_sched_reorder (DUMP, SCHED_VERBOSE, READY, N_READY)
+ ultrasparc_sched_reorder (DUMP, SCHED_VERBOSE, READY, N_READY); \
+ CIM = issue_rate; \
+} while (0)
#define MD_SCHED_VARIABLE_ISSUE(DUMP, SCHED_VERBOSE, INSN, CAN_ISSUE_MORE) \
- if (sparc_cpu == PROCESSOR_ULTRASPARC) \
- (CAN_ISSUE_MORE) = ultrasparc_variable_issue (INSN); \
- else \
- (CAN_ISSUE_MORE)--
+do { \
+ if (sparc_cpu == PROCESSOR_ULTRASPARC) \
+ (CAN_ISSUE_MORE) = ultrasparc_variable_issue (INSN); \
+ else \
+ (CAN_ISSUE_MORE)--; \
+} while (0)
/* Conditional branches with empty delay slots have a length of two. */
#define ADJUST_INSN_LENGTH(INSN, LENGTH) \
+do { \
if (GET_CODE (INSN) == CALL_INSN \
|| (GET_CODE (INSN) == JUMP_INSN && ! simplejump_p (insn))) \
- LENGTH += 1; else
+ LENGTH += 1; \
+} while (0)
/* Control the assembler format that we output. */
diff --git a/gcc/haifa-sched.c b/gcc/haifa-sched.c
index 7af338a..9325f61 100644
--- a/gcc/haifa-sched.c
+++ b/gcc/haifa-sched.c
@@ -3147,15 +3147,18 @@ insn_cost (insn, link, used)
and LINK_COST_ZERO. */
if (LINK_COST_FREE (link))
- cost = 1;
+ cost = 0;
#ifdef ADJUST_COST
else if (!LINK_COST_ZERO (link))
{
int ncost = cost;
ADJUST_COST (used, link, insn, ncost);
- if (ncost <= 1)
- LINK_COST_FREE (link) = ncost = 1;
+ if (ncost < 1)
+ {
+ LINK_COST_FREE (link) = 1;
+ ncost = 0;
+ }
if (cost == ncost)
LINK_COST_ZERO (link) = 1;
cost = ncost;
@@ -4362,10 +4365,13 @@ adjust_priority (prev)
}
break;
}
+ }
+
+ /* That said, a target might have it's own reasons for adjusting
+ priority after reload. */
#ifdef ADJUST_PRIORITY
- ADJUST_PRIORITY (prev);
+ ADJUST_PRIORITY (prev);
#endif
- }
}
/* Clock at which the previous instruction was issued. */
@@ -4439,7 +4445,7 @@ schedule_insn (insn, ready, n_ready, clock)
if (current_nr_blocks > 1 && INSN_BB (next) != target_bb)
fprintf (dump, "/b%d ", INSN_BLOCK (next));
- if (effective_cost <= 1)
+ if (effective_cost < 1)
fprintf (dump, "into ready\n");
else
fprintf (dump, "into queue with cost=%d\n", effective_cost);
@@ -4448,7 +4454,7 @@ schedule_insn (insn, ready, n_ready, clock)
/* Adjust the priority of NEXT and either put it on the ready
list or queue it. */
adjust_priority (next);
- if (effective_cost <= 1)
+ if (effective_cost < 1)
ready[n_ready++] = next;
else
queue_insn (next, effective_cost);
@@ -6675,7 +6681,6 @@ schedule_block (bb, rgn_n_insns)
/* Local variables. */
rtx insn, last;
rtx *ready;
- int i;
int n_ready = 0;
int can_issue_more;
@@ -6857,25 +6862,15 @@ schedule_block (bb, rgn_n_insns)
/* no insns scheduled in this block yet */
last_scheduled_insn = 0;
- /* Sort the ready list */
- SCHED_SORT (ready, n_ready);
-#ifdef MD_SCHED_REORDER
- MD_SCHED_REORDER (dump, sched_verbose, ready, n_ready);
-#endif
-
- if (sched_verbose >= 2)
- {
- fprintf (dump, ";;\t\tReady list initially: ");
- debug_ready_list (ready, n_ready);
- }
-
/* Q_SIZE is the total number of insns in the queue. */
q_ptr = 0;
q_size = 0;
- clock_var = 0;
last_clock_var = 0;
bzero ((char *) insn_queue, sizeof (insn_queue));
+ /* Start just before the beginning of time. */
+ clock_var = -1;
+
/* We start inserting insns after PREV_HEAD. */
last = prev_head;
@@ -6907,10 +6902,16 @@ schedule_block (bb, rgn_n_insns)
debug_ready_list (ready, n_ready);
}
- /* Sort the ready list. */
+ /* Sort the ready list based on priority. */
SCHED_SORT (ready, n_ready);
+
+ /* Allow the target to reorder the list, typically for
+ better instruction bundling. */
#ifdef MD_SCHED_REORDER
- MD_SCHED_REORDER (dump, sched_verbose, ready, n_ready);
+ MD_SCHED_REORDER (dump, sched_verbose, ready, n_ready, clock_var,
+ can_issue_more);
+#else
+ can_issue_more = issue_rate;
#endif
if (sched_verbose)
@@ -6919,110 +6920,96 @@ schedule_block (bb, rgn_n_insns)
debug_ready_list (ready, n_ready);
}
- /* Issue insns from ready list.
- It is important to count down from n_ready, because n_ready may change
- as insns are issued. */
- can_issue_more = issue_rate;
- for (i = n_ready - 1; i >= 0 && can_issue_more; i--)
+ /* Issue insns from ready list. */
+ while (n_ready != 0 && can_issue_more)
{
- rtx insn = ready[i];
+ /* Select and remove the insn from the ready list. */
+ rtx insn = ready[--n_ready];
int cost = actual_hazard (insn_unit (insn), insn, clock_var, 0);
- if (cost > 1)
+ if (cost >= 1)
{
queue_insn (insn, cost);
- ready[i] = ready[--n_ready]; /* remove insn from ready list */
+ continue;
}
- else if (cost == 0)
- {
- /* an interblock motion? */
- if (INSN_BB (insn) != target_bb)
- {
- rtx temp;
- if (IS_SPECULATIVE_INSN (insn))
- {
+ /* An interblock motion? */
+ if (INSN_BB (insn) != target_bb)
+ {
+ rtx temp;
- if (!check_live (insn, INSN_BB (insn)))
- {
- /* speculative motion, live check failed, remove
- insn from ready list */
- ready[i] = ready[--n_ready];
- continue;
- }
- update_live (insn, INSN_BB (insn));
+ if (IS_SPECULATIVE_INSN (insn))
+ {
+ if (!check_live (insn, INSN_BB (insn)))
+ continue;
+ update_live (insn, INSN_BB (insn));
- /* for speculative load, mark insns fed by it. */
- if (IS_LOAD_INSN (insn) || FED_BY_SPEC_LOAD (insn))
- set_spec_fed (insn);
+ /* For speculative load, mark insns fed by it. */
+ if (IS_LOAD_INSN (insn) || FED_BY_SPEC_LOAD (insn))
+ set_spec_fed (insn);
- nr_spec++;
- }
- nr_inter++;
+ nr_spec++;
+ }
+ nr_inter++;
- temp = insn;
- while (SCHED_GROUP_P (temp))
- temp = PREV_INSN (temp);
+ temp = insn;
+ while (SCHED_GROUP_P (temp))
+ temp = PREV_INSN (temp);
- /* Update source block boundaries. */
- b1 = INSN_BLOCK (temp);
- if (temp == BLOCK_HEAD (b1)
- && insn == BLOCK_END (b1))
- {
- /* We moved all the insns in the basic block.
- Emit a note after the last insn and update the
- begin/end boundaries to point to the note. */
- emit_note_after (NOTE_INSN_DELETED, insn);
- BLOCK_END (b1) = NEXT_INSN (insn);
- BLOCK_HEAD (b1) = NEXT_INSN (insn);
- }
- else if (insn == BLOCK_END (b1))
- {
- /* We took insns from the end of the basic block,
- so update the end of block boundary so that it
- points to the first insn we did not move. */
- BLOCK_END (b1) = PREV_INSN (temp);
- }
- else if (temp == BLOCK_HEAD (b1))
- {
- /* We took insns from the start of the basic block,
- so update the start of block boundary so that
- it points to the first insn we did not move. */
- BLOCK_HEAD (b1) = NEXT_INSN (insn);
- }
+ /* Update source block boundaries. */
+ b1 = INSN_BLOCK (temp);
+ if (temp == BLOCK_HEAD (b1)
+ && insn == BLOCK_END (b1))
+ {
+ /* We moved all the insns in the basic block.
+ Emit a note after the last insn and update the
+ begin/end boundaries to point to the note. */
+ emit_note_after (NOTE_INSN_DELETED, insn);
+ BLOCK_END (b1) = NEXT_INSN (insn);
+ BLOCK_HEAD (b1) = NEXT_INSN (insn);
}
- else
+ else if (insn == BLOCK_END (b1))
{
- /* in block motion */
- sched_target_n_insns++;
+ /* We took insns from the end of the basic block,
+ so update the end of block boundary so that it
+ points to the first insn we did not move. */
+ BLOCK_END (b1) = PREV_INSN (temp);
}
+ else if (temp == BLOCK_HEAD (b1))
+ {
+ /* We took insns from the start of the basic block,
+ so update the start of block boundary so that
+ it points to the first insn we did not move. */
+ BLOCK_HEAD (b1) = NEXT_INSN (insn);
+ }
+ }
+ else
+ {
+ /* In block motion. */
+ sched_target_n_insns++;
+ }
- last_scheduled_insn = insn;
- last = move_insn (insn, last);
- sched_n_insns++;
+ last_scheduled_insn = insn;
+ last = move_insn (insn, last);
+ sched_n_insns++;
#ifdef MD_SCHED_VARIABLE_ISSUE
- MD_SCHED_VARIABLE_ISSUE (dump, sched_verbose, insn, can_issue_more);
+ MD_SCHED_VARIABLE_ISSUE (dump, sched_verbose, insn,
+ can_issue_more);
#else
- can_issue_more--;
+ can_issue_more--;
#endif
- n_ready = schedule_insn (insn, ready, n_ready, clock_var);
+ n_ready = schedule_insn (insn, ready, n_ready, clock_var);
- /* remove insn from ready list */
- ready[i] = ready[--n_ready];
-
- /* close this block after scheduling its jump */
- if (GET_CODE (last_scheduled_insn) == JUMP_INSN)
- break;
- }
+ /* Close this block after scheduling its jump. */
+ if (GET_CODE (last_scheduled_insn) == JUMP_INSN)
+ break;
}
- /* debug info */
+ /* Debug info. */
if (sched_verbose)
- {
- visualize_scheduled_insns (b, clock_var);
- }
+ visualize_scheduled_insns (b, clock_var);
}
/* debug info */
diff --git a/gcc/tm.texi b/gcc/tm.texi
index 1527d31..28fefa8 100644
--- a/gcc/tm.texi
+++ b/gcc/tm.texi
@@ -7656,7 +7656,8 @@ debug output to. @var{verbose} is the verbose level provided by
@samp{-fsched-verbose-}@var{n}.
@findex MD_SCHED_REORDER
-@item MD_SCHED_REORDER (@var{file}, @var{verbose}, @var{ready}, @var{n_ready})
+@item MD_SCHED_REORDER (@var{file}, @var{verbose}, @var{ready}, @var{n_ready},
+ @var{clock}, @var{can_issue_more})
A C statement which is executed by the @samp{Haifa} scheduler after it
has scheduled the ready list to allow the machine description to reorder
it (for example to combine two small instructions together on
@@ -7666,7 +7667,10 @@ provided by @samp{-fsched-verbose-}@var{n}. @var{ready} is a pointer to
the ready list of instructions that are ready to be scheduled.
@var{n_ready} is the number of elements in the ready list. The
scheduler reads the ready list in reverse order, starting with
-@var{ready}[@var{n_ready}-1] and going to @var{ready}[0].
+@var{ready}[@var{n_ready}-1] and going to @var{ready}[0]. @var{clock}
+is the timer tick of the scheduler. @var{can_issue_more} is an output
+parameter that is set to the number of insns that can issue this clock;
+normally this is just @code{issue_rate}.
@findex MD_SCHED_VARIABLE_ISSUE
@item MD_SCHED_VARIABLE_ISSUE (@var{file}, @var{verbose}, @var{insn}, @var{more})