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authorTakayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>2022-07-15 19:50:52 +0900
committerMax Filippov <jcmvbkbc@gmail.com>2022-07-16 00:27:42 -0700
commit1884f8978237b15013576a720bcb32e7c5647574 (patch)
treeb98ef99aa38d61419a85495dcc6eadf1f28df9e1 /gcc
parentbdc7b765f8728cbb769fe1eeef773eda15578aee (diff)
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xtensa: constantsynth: Make try to find shorter instruction
This patch allows the constant synthesis to choose shorter instruction if possible. /* example */ int test(void) { return 128 << 8; } ;; before test: movi a2, 0x100 addmi a2, a2, 0x7f00 ret.n ;; after test: movi.n a2, 1 slli a2, a2, 15 ret.n When the Code Density Option is configured, the latter is one byte smaller than the former. gcc/ChangeLog: * config/xtensa/xtensa.cc (xtensa_emit_constantsynth): Remove. (xtensa_constantsynth_2insn): Change to try all three synthetic methods and to use the one that fits the immediate value of the seed into a Narrow Move Immediate instruction "MOVI.N" when the Code Density Option is configured.
Diffstat (limited to 'gcc')
-rw-r--r--gcc/config/xtensa/xtensa.cc58
1 files changed, 29 insertions, 29 deletions
diff --git a/gcc/config/xtensa/xtensa.cc b/gcc/config/xtensa/xtensa.cc
index 13f2b2b..9433745 100644
--- a/gcc/config/xtensa/xtensa.cc
+++ b/gcc/config/xtensa/xtensa.cc
@@ -1035,35 +1035,35 @@ xtensa_split_operand_pair (rtx operands[4], machine_mode mode)
load-immediate / arithmetic ones, instead of a L32R instruction
(plus a constant in litpool). */
-static void
-xtensa_emit_constantsynth (rtx dst, enum rtx_code code,
- HOST_WIDE_INT imm0, HOST_WIDE_INT imm1,
- rtx (*gen_op)(rtx, HOST_WIDE_INT),
- HOST_WIDE_INT imm2)
-{
- gcc_assert (REG_P (dst));
- emit_move_insn (dst, GEN_INT (imm0));
- emit_move_insn (dst, gen_rtx_fmt_ee (code, SImode,
- dst, GEN_INT (imm1)));
- if (gen_op)
- emit_move_insn (dst, gen_op (dst, imm2));
-}
-
static int
xtensa_constantsynth_2insn (rtx dst, HOST_WIDE_INT srcval,
rtx (*gen_op)(rtx, HOST_WIDE_INT),
HOST_WIDE_INT op_imm)
{
- int shift = exact_log2 (srcval + 1);
+ HOST_WIDE_INT imm = INT_MAX;
+ rtx x = NULL_RTX;
+ int shift;
+ gcc_assert (REG_P (dst));
+
+ shift = exact_log2 (srcval + 1);
if (IN_RANGE (shift, 1, 31))
{
- xtensa_emit_constantsynth (dst, LSHIFTRT, -1, 32 - shift,
- gen_op, op_imm);
- return 1;
+ imm = -1;
+ x = gen_lshrsi3 (dst, dst, GEN_INT (32 - shift));
}
- if (IN_RANGE (srcval, (-2048 - 32768), (2047 + 32512)))
+
+ shift = ctz_hwi (srcval);
+ if ((!x || (TARGET_DENSITY && ! IN_RANGE (imm, -32, 95)))
+ && xtensa_simm12b (srcval >> shift))
+ {
+ imm = srcval >> shift;
+ x = gen_ashlsi3 (dst, dst, GEN_INT (shift));
+ }
+
+ if ((!x || (TARGET_DENSITY && ! IN_RANGE (imm, -32, 95)))
+ && IN_RANGE (srcval, (-2048 - 32768), (2047 + 32512)))
{
HOST_WIDE_INT imm0, imm1;
@@ -1076,19 +1076,19 @@ xtensa_constantsynth_2insn (rtx dst, HOST_WIDE_INT srcval,
imm0 = srcval - imm1;
if (TARGET_DENSITY && imm1 < 32512 && IN_RANGE (imm0, 224, 255))
imm0 -= 256, imm1 += 256;
- xtensa_emit_constantsynth (dst, PLUS, imm0, imm1, gen_op, op_imm);
- return 1;
+ imm = imm0;
+ x = gen_addsi3 (dst, dst, GEN_INT (imm1));
}
- shift = ctz_hwi (srcval);
- if (xtensa_simm12b (srcval >> shift))
- {
- xtensa_emit_constantsynth (dst, ASHIFT, srcval >> shift, shift,
- gen_op, op_imm);
- return 1;
- }
+ if (!x)
+ return 0;
- return 0;
+ emit_move_insn (dst, GEN_INT (imm));
+ emit_insn (x);
+ if (gen_op)
+ emit_move_insn (dst, gen_op (dst, op_imm));
+
+ return 1;
}
static rtx