AArch64: Add support for __builtin_roundeven[f] (PR100966)

Enable __builtin_roundeven[f] by changing existing frintn to roundeven.

2021-10-20  Wilco Dijkstra  <wdijkstr@arm.com>

gcc/
	PR target/100966
	* config/aarch64/aarch64.md (frint_pattern): Update comment.
	* config/aarch64/aarch64-simd-builtins.def: Change frintn to roundeven.
	* config/aarch64/arm_fp16.h: Change frintn to roundeven.
	* config/aarch64/arm_neon.h: Likewise.
	* config/aarch64/iterators.md (frint_pattern): Use roundeven for FRINTN.

gcc/testsuite/
	PR target/100966
	* gcc.target/aarch64/frint.x: Add roundeven tests.
	* gcc.target/aarch64/frint_double.c: Likewise.
	* gcc.target/aarch64/frint_float.c: Likewise.

8 files changed, 25 insertions, 11 deletions

diff --git a/gcc/config/aarch64/aarch64-simd-builtins.def b/gcc/config/aarch64/aarch64-simd-builtins.def
index 35dc075..be1c5b5 100644
--- a/gcc/config/aarch64/aarch64-simd-builtins.def
+++ b/gcc/config/aarch64/aarch64-simd-builtins.def
@@ -506,7 +506,7 @@
   BUILTIN_VHSDF (UNOP, nearbyint, 2, FP)
   BUILTIN_VHSDF (UNOP, rint, 2, FP)
   BUILTIN_VHSDF (UNOP, round, 2, FP)
-  BUILTIN_VHSDF_HSDF (UNOP, frintn, 2, FP)
+  BUILTIN_VHSDF_HSDF (UNOP, roundeven, 2, FP)
 
   VAR1 (UNOP, btrunc, 2, FP, hf)
   VAR1 (UNOP, ceil, 2, FP, hf)
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 7085cd4..1a39470 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -5920,7 +5920,7 @@
 ;; -------------------------------------------------------------------
 
 ;; frint floating-point round to integral standard patterns.
-;; Expands to btrunc, ceil, floor, nearbyint, rint, round, frintn.
+;; Expands to btrunc, ceil, floor, nearbyint, rint, round, roundeven.
 
 (define_insn "<frint_pattern><mode>2"
   [(set (match_operand:GPF_F16 0 "register_operand" "=w")
diff --git a/gcc/config/aarch64/arm_fp16.h b/gcc/config/aarch64/arm_fp16.h
index 2633953..c223546 100644
--- a/gcc/config/aarch64/arm_fp16.h
+++ b/gcc/config/aarch64/arm_fp16.h
@@ -383,7 +383,7 @@ __extension__ extern __inline float16_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 vrndnh_f16 (float16_t __a)
 {
-  return __builtin_aarch64_frintnhf (__a);
+  return __builtin_aarch64_roundevenhf (__a);
 }
 
 __extension__ extern __inline float16_t
diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h
index 24068f8..1768c6b 100644
--- a/gcc/config/aarch64/arm_neon.h
+++ b/gcc/config/aarch64/arm_neon.h
@@ -26359,35 +26359,35 @@ __extension__ extern __inline float32_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 vrndns_f32 (float32_t __a)
 {
-  return __builtin_aarch64_frintnsf (__a);
+  return __builtin_aarch64_roundevensf (__a);
 }
 
 __extension__ extern __inline float32x2_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 vrndn_f32 (float32x2_t __a)
 {
-  return __builtin_aarch64_frintnv2sf (__a);
+  return __builtin_aarch64_roundevenv2sf (__a);
 }
 
 __extension__ extern __inline float64x1_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 vrndn_f64 (float64x1_t __a)
 {
-  return (float64x1_t) {__builtin_aarch64_frintndf (__a[0])};
+  return (float64x1_t) {__builtin_aarch64_roundevendf (__a[0])};
 }
 
 __extension__ extern __inline float32x4_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 vrndnq_f32 (float32x4_t __a)
 {
-  return __builtin_aarch64_frintnv4sf (__a);
+  return __builtin_aarch64_roundevenv4sf (__a);
 }
 
 __extension__ extern __inline float64x2_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 vrndnq_f64 (float64x2_t __a)
 {
-  return __builtin_aarch64_frintnv2df (__a);
+  return __builtin_aarch64_roundevenv2df (__a);
 }
 
 /* vrndp  */
@@ -32792,14 +32792,14 @@ __extension__ extern __inline float16x4_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 vrndn_f16 (float16x4_t __a)
 {
-  return __builtin_aarch64_frintnv4hf (__a);
+  return __builtin_aarch64_roundevenv4hf (__a);
 }
 
 __extension__ extern __inline float16x8_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 vrndnq_f16 (float16x8_t __a)
 {
-  return __builtin_aarch64_frintnv8hf (__a);
+  return __builtin_aarch64_roundevenv8hf (__a);
 }
 
 __extension__ extern __inline float16x4_t
diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md
index caa42f8..e4af27b 100644
--- a/gcc/config/aarch64/iterators.md
+++ b/gcc/config/aarch64/iterators.md
@@ -3084,7 +3084,7 @@
 				(UNSPEC_FRINTI "nearbyint")
 				(UNSPEC_FRINTX "rint")
 				(UNSPEC_FRINTA "round")
-				(UNSPEC_FRINTN "frintn")])
+				(UNSPEC_FRINTN "roundeven")])
 
 ;; frint suffix for floating-point rounding instructions.
 (define_int_attr frint_suffix [(UNSPEC_FRINTZ "z") (UNSPEC_FRINTP "p")
diff --git a/gcc/testsuite/gcc.target/aarch64/frint.x b/gcc/testsuite/gcc.target/aarch64/frint.x
index 1403740..d598a25 100644
--- a/gcc/testsuite/gcc.target/aarch64/frint.x
+++ b/gcc/testsuite/gcc.target/aarch64/frint.x
@@ -4,6 +4,7 @@ extern GPF SUFFIX(floor) (GPF);
 extern GPF SUFFIX(nearbyint) (GPF);
 extern GPF SUFFIX(rint) (GPF);
 extern GPF SUFFIX(round) (GPF);
+extern GPF SUFFIX(roundeven) (GPF);
 
 GPF test1a (GPF x)
 {
@@ -64,3 +65,14 @@ GPF test6b (GPF x)
 {
   return SUFFIX(round)(x);
 }
+
+GPF test7a (GPF x)
+{
+  return SUFFIX(__builtin_roundeven)(x);
+}
+
+GPF test7b (GPF x)
+{
+  return SUFFIX(roundeven)(x);
+}
+
diff --git a/gcc/testsuite/gcc.target/aarch64/frint_double.c b/gcc/testsuite/gcc.target/aarch64/frint_double.c
index 9613949..1d28eb0 100644
--- a/gcc/testsuite/gcc.target/aarch64/frint_double.c
+++ b/gcc/testsuite/gcc.target/aarch64/frint_double.c
@@ -12,3 +12,4 @@
 /* { dg-final { scan-assembler-times "frinti\td\[0-9\]" 2 } } */
 /* { dg-final { scan-assembler-times "frintx\td\[0-9\]" 2 } } */
 /* { dg-final { scan-assembler-times "frinta\td\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "frintn\td\[0-9\]" 2 } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/frint_float.c b/gcc/testsuite/gcc.target/aarch64/frint_float.c
index 493ec37..530cf97 100644
--- a/gcc/testsuite/gcc.target/aarch64/frint_float.c
+++ b/gcc/testsuite/gcc.target/aarch64/frint_float.c
@@ -12,3 +12,4 @@
 /* { dg-final { scan-assembler-times "frinti\ts\[0-9\]" 2 } } */
 /* { dg-final { scan-assembler-times "frintx\ts\[0-9\]" 2 } } */
 /* { dg-final { scan-assembler-times "frinta\ts\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "frintn\ts\[0-9\]" 2 } } */