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authorTom de Vries <tdevries@suse.de>2020-09-07 10:47:25 +0200
committerTom de Vries <tdevries@suse.de>2020-09-11 12:06:15 +0200
commit15545563128f0240192c263522d4a36b7f86250f (patch)
tree746bb4c9e006aa697779062ec38bfd6e35ff6fea /gcc
parent8ae0de5621120b16295fe6b73ca044d4c576af6d (diff)
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[libatomic] Add nvptx support
Add nvptx support to libatomic. Given that atomic_test_and_set is not implemented for nvptx (PR96964), the compiler translates __atomic_test_and_set falling back onto the "Failing all else, assume a single threaded environment and simply perform the operation" case in expand_atomic_test_and_set, so it doesn't map onto an actual atomic operation. Still, that counts as supported for the configure test of libatomic, so we end up with HAVE_ATOMIC_TAS_1/2/4/8/16 == 1, and the corresponding __atomic_test_and_set_1/2/4/8/16 in libatomic all using that non-atomic implementation. Fix this by adding an atomic_test_and_set expansion for nvptx, that uses libatomics __atomic_test_and_set_1. This again makes the configure tests for HAVE_ATOMIC_TAS_1/2/4/8/16 fail, so instead we use this case in tas_n.c: ... /* If this type is smaller than word-sized, fall back to a word-sized compare-and-swap loop. */ bool SIZE(libat_test_and_set) (UTYPE *mptr, int smodel) ... which for __atomic_test_and_set_8 uses INVERT_MASK_8. Add INVERT_MASK_8 in libatomic_i.h, as well as MASK_8. Tested libatomic testsuite on nvptx. gcc/ChangeLog: PR target/96964 * config/nvptx/nvptx.md (define_expand "atomic_test_and_set"): New expansion. libatomic/ChangeLog: PR target/96898 * configure.tgt: Add nvptx. * libatomic_i.h (MASK_8, INVERT_MASK_8): New macro definition. * config/nvptx/host-config.h: New file. * config/nvptx/lock.c: New file.
Diffstat (limited to 'gcc')
-rw-r--r--gcc/config/nvptx/nvptx.md16
1 files changed, 16 insertions, 0 deletions
diff --git a/gcc/config/nvptx/nvptx.md b/gcc/config/nvptx/nvptx.md
index 4168190..6178e6a 100644
--- a/gcc/config/nvptx/nvptx.md
+++ b/gcc/config/nvptx/nvptx.md
@@ -1667,6 +1667,22 @@
"%.\\tatom%A1.b%T0.<logic>\\t%0, %1, %2;"
[(set_attr "atomic" "true")])
+(define_expand "atomic_test_and_set"
+ [(match_operand:SI 0 "nvptx_register_operand") ;; bool success output
+ (match_operand:QI 1 "memory_operand") ;; memory
+ (match_operand:SI 2 "const_int_operand")] ;; model
+ ""
+{
+ rtx libfunc;
+ rtx addr;
+ libfunc = init_one_libfunc ("__atomic_test_and_set_1");
+ addr = convert_memory_address (ptr_mode, XEXP (operands[1], 0));
+ emit_library_call_value (libfunc, operands[0], LCT_NORMAL, SImode,
+ addr, ptr_mode,
+ operands[2], SImode);
+ DONE;
+})
+
(define_insn "nvptx_barsync"
[(unspec_volatile [(match_operand:SI 0 "nvptx_nonmemory_operand" "Ri")
(match_operand:SI 1 "const_int_operand")]