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authorSteve Ellcey <sellcey@imgtec.com>2016-01-28 22:25:55 +0000
committerSteve Ellcey <sje@gcc.gnu.org>2016-01-28 22:25:55 +0000
commit0b16c7b99c6cc212135d6dba70bbc5ef47af4dbe (patch)
tree22d16e1afdce3f03f67c2c3bddee5972773f18e5 /gcc
parent494de84f5e8197b21249e724cfc55d25a788dd14 (diff)
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re PR target/68400 (ICE in change_address_1, at emit-rtl.c:2125)
2016-01-28 Steve Ellcey <sellcey@imgtec.com> PR target/68400 * config/mips/mips.c (and_operands_ok): Add MIPS16 check. From-SVN: r232952
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/config/mips/mips.c15
2 files changed, 17 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4df81d5..209bb0d 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2016-01-28 Steve Ellcey <sellcey@imgtec.com>
+
+ PR target/68400
+ * config/mips/mips.c (and_operands_ok): Add MIPS16 check.
+
2016-01-28 Jakub Jelinek <jakub@redhat.com>
PR middle-end/69542
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 890e947..84fbc97 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -8006,9 +8006,18 @@ mask_low_and_shift_p (machine_mode mode, rtx mask, rtx shift, int maxlen)
bool
and_operands_ok (machine_mode mode, rtx op1, rtx op2)
{
- return (memory_operand (op1, mode)
- ? and_load_operand (op2, mode)
- : and_reg_operand (op2, mode));
+
+ if (memory_operand (op1, mode))
+ {
+ if (TARGET_MIPS16) {
+ struct mips_address_info addr;
+ if (!mips_classify_address (&addr, op1, mode, false))
+ return false;
+ }
+ return and_load_operand (op2, mode);
+ }
+ else
+ return and_reg_operand (op2, mode);
}
/* The canonical form of a mask-low-and-shift-left operation is