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| author | Uros Bizjak <uros@gcc.gnu.org> | 2012-06-17 15:48:31 +0200 |
|---|---|---|
| committer | Uros Bizjak <uros@gcc.gnu.org> | 2012-06-17 15:48:31 +0200 |
| commit | 0a2818d5f923d2e11a3bb87bd256b8b39a0d67d4 (patch) | |
| tree | d0813d3105857a5240d9d37e003e418282091f6d /gcc | |
| parent | 413c35303e4187c67f45b64d67d4167ba2497bdf (diff) | |
| download | gcc-0a2818d5f923d2e11a3bb87bd256b8b39a0d67d4.zip gcc-0a2818d5f923d2e11a3bb87bd256b8b39a0d67d4.tar.gz gcc-0a2818d5f923d2e11a3bb87bd256b8b39a0d67d4.tar.bz2 | |
sse.md (vcvtph2ps): Fix vec_select selector.
* config/i386/sse.md (vcvtph2ps): Fix vec_select selector.
From-SVN: r188704
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 9 | ||||
| -rw-r--r-- | gcc/config/i386/sse.md | 2 |
2 files changed, 7 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index caaef02..e3a827c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,9 +1,13 @@ +2012-06-17 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/sse.md (vcvtph2ps): Fix vec_select selector. + 2012-06-16 Eric Botcazou <ebotcazou@adacore.com> PR middle-end/53590 * tree-inline.c (initialize_cfun): Copy can_delete_dead_exceptions. -2012-06-15 Easwaran Raman <eraman@google.com> +2012-06-15 Easwaran Raman <eraman@google.com> * passes.c (init_optimization_passes): Remove pass_call_cdce from its current position and insert after pass_dce. @@ -115,8 +119,7 @@ * expmed.c (choose_multiplier): No longer static. Change multiplier_ptr from rtx * to UHWI *. (expand_divmod): Adjust callers. - * tree-vect-patterns.c (vect_recog_sdivmod_pow2_pattern): - Renamed to... + * tree-vect-patterns.c (vect_recog_sdivmod_pow2_pattern): Renamed to... (vect_recog_divmod_pattern): ... this. Pass bb_vinfo as last argument to new_stmt_vec_info. Attempt to optimize also divisions by non-pow2 constants if integer vector division isn't supported. diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 6a8206a..654969f 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -11647,7 +11647,7 @@ (unspec:V8SF [(match_operand:V8HI 1 "register_operand" "x")] UNSPEC_VCVTPH2PS) (parallel [(const_int 0) (const_int 1) - (const_int 1) (const_int 2)])))] + (const_int 2) (const_int 3)])))] "TARGET_F16C" "vcvtph2ps\t{%1, %0|%0, %1}" [(set_attr "type" "ssecvt") |