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| author | Richard Kenner <kenner@vlsi1.ultra.nyu.edu> | 2001-07-10 22:09:10 +0000 |
|---|---|---|
| committer | Richard Kenner <kenner@gcc.gnu.org> | 2001-07-10 18:09:10 -0400 |
| commit | 07217645f7ab36e65d91ff5ab0d8778ba9f924b5 (patch) | |
| tree | 75d83831603917d240d2a453239b4b0485baae9c /gcc | |
| parent | 91667711832211a065a5bff2484c26390197986e (diff) | |
| download | gcc-07217645f7ab36e65d91ff5ab0d8778ba9f924b5.zip gcc-07217645f7ab36e65d91ff5ab0d8778ba9f924b5.tar.gz gcc-07217645f7ab36e65d91ff5ab0d8778ba9f924b5.tar.bz2 | |
recog.c (offsettable_address_p): Handle LO_SUM case.
* recog.c (offsettable_address_p): Handle LO_SUM case.
* config/mips/mips.c (double_memory_operand): Use adjust_address_nv
instead of plus_constant.
From-SVN: r43912
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/mips/mips.c | 12 | ||||
| -rw-r--r-- | gcc/recog.c | 10 |
3 files changed, 17 insertions, 11 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a15eb81..34b7610 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +Tue Jul 10 07:27:53 2001 Richard Kenner <kenner@vlsi1.ultra.nyu.edu> + + * recog.c (offsettable_address_p): Handle LO_SUM case. + * config/mips/mips.c (double_memory_operand): Use adjust_address_nv + instead of plus_constant. + 2001-07-10 Stephane Carrez <Stephane.Carrez@worldnet.fr> * reload1.c (merge_assigned_reloads): After a RELOAD_OTHER merge, diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 0335667..48c3915 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -838,8 +838,6 @@ double_memory_operand (op, mode) rtx op; enum machine_mode mode; { - rtx addr; - if (GET_CODE (op) != MEM || ! memory_operand (op, mode)) { @@ -939,14 +937,12 @@ double_memory_operand (op, mode) /* Make sure that 4 added to the address is a valid memory address. This essentially just checks for overflow in an added constant. */ - addr = XEXP (op, 0); - - if (CONSTANT_ADDRESS_P (addr)) + if (CONSTANT_ADDRESS_P (XEXP (op, 0))) return 1; - return memory_address_p ((GET_MODE_CLASS (mode) == MODE_INT - ? SImode : SFmode), - plus_constant (addr, 4)); + op = adjust_address_nv (op, GET_MODE_CLASS (mode) == MODE_INT + ? SImode : SFmode, 4); + return memory_address_p (XEXP (op, 0)); } /* Return nonzero if the code of this rtx pattern is EQ or NE. */ diff --git a/gcc/recog.c b/gcc/recog.c index 01bc1f3..26ff030 100644 --- a/gcc/recog.c +++ b/gcc/recog.c @@ -1963,9 +1963,13 @@ offsettable_address_p (strictp, mode, y) /* The offset added here is chosen as the maximum offset that any instruction could need to add when operating on something of the specified mode. We assume that if Y and Y+c are - valid addresses then so is Y+d for all 0<d<c. */ - - z = plus_constant (y, mode_sz - 1); + valid addresses then so is Y+d for all 0<d<c. adjust_address will + go inside a LO_SUM here, so we do so as well. */ + if (GET_CODE (y) == LO_SUM) + z = gen_rtx_LO_SUM (GET_MODE (y), XEXP (y, 0), + plus_constant (XEXP (y, 1), mode_sz - 1)); + else + z = plus_constant (y, mode_sz - 1); /* Use QImode because an odd displacement may be automatically invalid for any wider mode. But it should be valid for a single byte. */ |