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| author | James Greenhalgh <james.greenhalgh@arm.com> | 2014-06-23 16:00:02 +0000 |
|---|---|---|
| committer | James Greenhalgh <jgreenhalgh@gcc.gnu.org> | 2014-06-23 16:00:02 +0000 |
| commit | 0379033b6388ad245e8926766929012c27b6f20a (patch) | |
| tree | 35ccad7b6416801efc000d0cba69c9231567e0e4 /gcc | |
| parent | 82bb92454f99f40d02ebedb6088e403b6809dc6b (diff) | |
| download | gcc-0379033b6388ad245e8926766929012c27b6f20a.zip gcc-0379033b6388ad245e8926766929012c27b6f20a.tar.gz gcc-0379033b6388ad245e8926766929012c27b6f20a.tar.bz2 | |
Re: [AArch64] Implement ADD in vector registers for 32-bit scalar values.
gcc/
* config/aarch64/aarch64.md (addsi3_aarch64): Set "simd" attr to
"yes" where needed.
From-SVN: r211899
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64.md | 3 |
2 files changed, 7 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 7979ff9..32917ef 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2014-06-23 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64.md (addsi3_aarch64): Set "simd" attr to + "yes" where needed. + 2014-06-23 Alan Modra <amodra@gmail.com> PR bootstrap/61583 diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 5f5b4ff..8705ee9 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -1167,7 +1167,8 @@ add\\t%w0, %w1, %w2 add\\t%0.2s, %1.2s, %2.2s sub\\t%w0, %w1, #%n2" - [(set_attr "type" "alu_imm,alu_reg,neon_add,alu_imm")] + [(set_attr "type" "alu_imm,alu_reg,neon_add,alu_imm") + (set_attr "simd" "*,*,yes,*")] ) ;; zero_extend version of above |