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author | Andrew Pinski <apinski@marvell.com> | 2022-02-09 14:56:58 -0800 |
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committer | Andrew Pinski <apinski@marvell.com> | 2022-02-09 16:49:33 -0800 |
commit | 41582f88ec01c5ce2f85ebc4ac2743eb426d6e33 (patch) | |
tree | f49af1bf19ee7e39701cc7a3471491a49836b3b6 /gcc/tree.cc | |
parent | 3adf509fe6feca9442fb36c35dd9a81a3a369d08 (diff) | |
download | gcc-41582f88ec01c5ce2f85ebc4ac2743eb426d6e33.zip gcc-41582f88ec01c5ce2f85ebc4ac2743eb426d6e33.tar.gz gcc-41582f88ec01c5ce2f85ebc4ac2743eb426d6e33.tar.bz2 |
[COMMITTED] Fix PR aarch64/104474: ICE with vector float initializers and non-consts.
The problem here is that the aarch64 back-end was placing const0_rtx
into the constant vector RTL even if the mode was a floating point mode.
The fix is instead to use CONST0_RTX and pass the mode to select the
correct zero (either const_int or const_double).
Committed as obvious after a bootstrap/test on aarch64-linux-gnu with
no regressions.
PR target/104474
gcc/ChangeLog:
* config/aarch64/aarch64.cc
(aarch64_sve_expand_vector_init_handle_trailing_constants):
Use CONST0_RTX instead of const0_rtx for the non-constant elements.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/sve/pr104474-1.c: New test.
* gcc.target/aarch64/sve/pr104474-2.c: New test.
* gcc.target/aarch64/sve/pr104474-3.c: New test.
Diffstat (limited to 'gcc/tree.cc')
0 files changed, 0 insertions, 0 deletions