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authorAndrew Pinski <apinski@marvell.com>2022-02-09 14:56:58 -0800
committerAndrew Pinski <apinski@marvell.com>2022-02-09 16:49:33 -0800
commit41582f88ec01c5ce2f85ebc4ac2743eb426d6e33 (patch)
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parent3adf509fe6feca9442fb36c35dd9a81a3a369d08 (diff)
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[COMMITTED] Fix PR aarch64/104474: ICE with vector float initializers and non-consts.
The problem here is that the aarch64 back-end was placing const0_rtx into the constant vector RTL even if the mode was a floating point mode. The fix is instead to use CONST0_RTX and pass the mode to select the correct zero (either const_int or const_double). Committed as obvious after a bootstrap/test on aarch64-linux-gnu with no regressions. PR target/104474 gcc/ChangeLog: * config/aarch64/aarch64.cc (aarch64_sve_expand_vector_init_handle_trailing_constants): Use CONST0_RTX instead of const0_rtx for the non-constant elements. gcc/testsuite/ChangeLog: * gcc.target/aarch64/sve/pr104474-1.c: New test. * gcc.target/aarch64/sve/pr104474-2.c: New test. * gcc.target/aarch64/sve/pr104474-3.c: New test.
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