aarch64: PR target/99195 Annotate complex FP patterns for vec-concat-zero

This patch annotates the complex add and mla patterns for vec-concat-zero.
Testing showed an interesting bug in our MD patterns where they were defined to match:
	(plus:VHSDF (match_operand:VHSDF 1 "register_operand" "0")
		    (unspec:VHSDF [(match_operand:VHSDF 2 "register_operand" "w")
				   (match_operand:VHSDF 3 "register_operand" "w")
				   (match_operand:SI 4 "const_int_operand" "n")]
				   FCMLA))

but the canonicalisation rules for PLUS require the more "complex" operand to be first so
during combine when the new substituted patterns were attempted to be formed combine/recog would
try to match:
(plus:V2SF (unspec:V2SF [
                        (reg:V2SF 100)
                        (reg:V2SF 101)
                        (const_int 0 [0])
                    ] UNSPEC_FCMLA270)
                (reg:V2SF 99))
instead. This patch fixes the operands of the PLUS RTX in these patterns.
Similar patterns for the dot-product instructions already used the right order.

Bootstrapped and tested on aarch64-none-linux-gnu and aarch64_be-none-elf.

gcc/ChangeLog:

	PR target/99195
	* config/aarch64/aarch64-simd.md (aarch64_fcadd<rot><mode>): Rename to...
	(aarch64_fcadd<rot><mode><vczle><vczbe>): ... This.
	Fix canonicalization of PLUS operands.
	(aarch64_fcmla<rot><mode>): Rename to...
	(aarch64_fcmla<rot><mode><vczle><vczbe>): ... This.
	Fix canonicalization of PLUS operands.
	(aarch64_fcmla_lane<rot><mode>): Rename to...
	(aarch64_fcmla_lane<rot><mode><vczle><vczbe>): ... This.
	Fix canonicalization of PLUS operands.
	(aarch64_fcmla_laneq<rot>v4hf): Rename to...
	(aarch64_fcmla_laneq<rot>v4hf<vczle><vczbe>): ... This.
	Fix canonicalization of PLUS operands.
	(aarch64_fcmlaq_lane<rot><mode>): Fix canonicalization of PLUS operands.

gcc/testsuite/ChangeLog:

	PR target/99195
	* gcc.target/aarch64/simd/pr99195_9.c: New test.

0 files changed, 0 insertions, 0 deletions