diff options
| author | Roger Sayle <roger@nextmovesoftware.com> | 2024-03-05 11:06:17 +0100 |
|---|---|---|
| committer | Georg-Johann Lay <avr@gjlay.de> | 2024-03-05 12:10:42 +0100 |
| commit | 49a1a340ea0eef681f23b6861f3cdb6840aadd99 (patch) | |
| tree | afd0a56d1f6209d68ed77e1a9e5e4b424d5a739d /gcc/tree-stdarg.cc | |
| parent | 7890836de20912bd92afaf5abbeaf9d8c5b86542 (diff) | |
| download | gcc-49a1a340ea0eef681f23b6861f3cdb6840aadd99.zip gcc-49a1a340ea0eef681f23b6861f3cdb6840aadd99.tar.gz gcc-49a1a340ea0eef681f23b6861f3cdb6840aadd99.tar.bz2 | |
AVR: Improve output of insn "*insv.any_shift.<mode>_split".
The instructions printed by insn "*insv.any_shift.<mode>_split" were
sub-optimal. The code to print the improved output is lengthy and
performed by new function avr_out_insv. As it turns out, the function
can also handle shift-offsets of zero, which is "*andhi3", "*andpsi3"
and "*andsi3". Thus, these tree insns get a new 3-operand alternative
where the 3rd operand is an exact power of 2.
gcc/
* config/avr/avr-protos.h (avr_out_insv): New proto.
* config/avr/avr.cc (avr_out_insv): New function.
(avr_adjust_insn_length) [ADJUST_LEN_INSV]: Handle case.
(avr_cbranch_cost) [ZERO_EXTRACT]: Adjust rtx costs.
* config/avr/avr.md (define_attr "adjust_len") Add insv.
(andhi3, *andhi3, andpsi3, *andpsi3, andsi3, *andsi3):
Add constraint alternative where the 3rd operand is a power
of 2, and the source register may differ from the destination.
(*insv.any_shift.<mode>_split): Call avr_out_insv to output
instructions. Set attr "length" to "insv".
* config/avr/constraints.md (Cb2, Cb3, Cb4): New constraints.
gcc/testsuite/
* gcc.target/avr/torture/insv-anyshift-hi.c: New test.
* gcc.target/avr/torture/insv-anyshift-si.c: New test.
Diffstat (limited to 'gcc/tree-stdarg.cc')
0 files changed, 0 insertions, 0 deletions