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| author | Haochen Jiang <haochen.jiang@intel.com> | 2023-10-09 16:09:53 +0800 |
|---|---|---|
| committer | Haochen Jiang <haochen.jiang@intel.com> | 2023-10-09 17:08:09 +0800 |
| commit | 1b24890716f1d28daf6011a14b5d06fd23399361 (patch) | |
| tree | 0ad9865129197e564f866bc9d7ea51071a7165e0 /gcc/tree-stdarg.cc | |
| parent | c1eef66baa8dde706d7ea6921648e6016dc7c93d (diff) | |
| download | gcc-1b24890716f1d28daf6011a14b5d06fd23399361.zip gcc-1b24890716f1d28daf6011a14b5d06fd23399361.tar.gz gcc-1b24890716f1d28daf6011a14b5d06fd23399361.tar.bz2 | |
Support -mevex512 for AVX512DQ intrins
gcc/ChangeLog:
* config/i386/i386-expand.cc (ix86_expand_sse2_mulvxdi3):
Add TARGET_EVEX512 for 512 bit usage.
* config/i386/i386.cc (standard_sse_constant_opcode): Ditto.
* config/i386/sse.md (VF1_VF2_AVX512DQ): Ditto.
(VF1_128_256VL): Ditto.
(VF2_AVX512VL): Ditto.
(VI8_256_512): Ditto.
(<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
Ditto.
(AVX512_VEC): Ditto.
(AVX512_VEC_2): Ditto.
(VI4F_BRCST32x2): Ditto.
(VI8F_BRCST64x2): Ditto.
Diffstat (limited to 'gcc/tree-stdarg.cc')
0 files changed, 0 insertions, 0 deletions